Datasheet

Interfaces
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
100 Order Number: 323103-001
2.3.9.2 SMBus Configuration and Memory Word-Size Reads
Figure 33. SMBus Word-Size Configuration Register Read
Figure 34. SMBus Word-Size Memory Register Read
S 1110_1X0 W A Cmd = 10010001 A Bus Num A Dev / Func A
Write address
for a Read
sequence
S 1110_1X0 W A Cmd = 10010001 A
Sr
1110_1X0 R A Status A Data [31:24] A
Read Sequence
Poll until
Status[7] = 0
PEC
S 1110_1X0 W A Cmd = 01010001 A Rsv[3:0] & Addr[11:8] A Regoff [7:0]
A P
A PEC A P
PEC N P
S 1110_1X0 W A Cmd = 00010001 A
Sr
1110_1X0 R A Data [23:16] A Data [15:8] AA PEC N P
S 1110_1X0 W A Cmd = 01010000 A
Sr
1110_1X0 R A Data [7:0] A PEC N P
S 1110_1X0 W A Cmd = 10110001 A Mem region A Addr off[23:16] A
Write address
for a Read
sequence
S 1110_1X0 W A Cmd = 10110001 A
Sr
1110_1X0 R A Status A Data [31:24] A
Read Sequence
Poll until
Status[7] = 0
PEC
S 1110_1X0 W A Cmd = 01110001 A Addr off[15:8] A Addr off[7:0]
A P
A PEC A P
PEC N P
S 1110_1X0 W A Cmd = 00110001 A
Sr
1110_1X0 R A Data [23:16] A Data [15:8] AA PEC N P
S 1110_1X0 W A Cmd = 01110000 A
Sr
1110_1X0 R A Data [7:0] A PEC N P