Datasheet

Electrical Specifications
18 Datasheet
2.6.2 DC Voltage and Current Specification
NOTES:
1. Each processor is programmed with a maximum valid voltage identification value (VID),
which is set at manufacturing and can not be altered. Individual maximum VID values are
calibrated during manufacturing such that two processors at the same frequency may have
different settings within the VID range. Note that this differs from the VID employed by the
processor during a power management event (Thermal Monitor 2, Enhanced Intel
SpeedStep technology, or Extended HALT State).
2. Unless otherwise noted, all specifications in this table are based on estimates and
simulations or empirical data. These specifications will be updated with characterized data
from silicon measurements at a later date.
Table 4. Voltage and Current Specifications
Symbol Parameter Min Typ Max Unit Notes
2, 10
VID Range VID 0.8500 — 1.3625 V 1
Core V
CC
Processor Number
(2 MB Cache):
E6600
E6500
E6300
E5200
E5300
E5400
E5500
V
CC
for
775_VR_CONFIG_06:
3.06 GHz
2.93 GHz
2.80 GHz
2.50 GHz
2.66 GHz
2.70 GHz
2.80 GHz
Refer to Table 5, Figure 1 V3, 4, 5
V
CC_BOOT
Default V
CC
voltage for initial power up — 1.10 — V
V
CCPLL
PLL V
CC
- 5% 1.50 + 5% V
I
CC
Processor Number
(2 MB Cache):
E6600
E6500
E6300
E5200
E5300
E5400
E5500
V
CC
for
775_VR_CONFIG_06:
3.06 GHz
2.93 GHz
2.80 GHz
2.50 GHz
2.66 GHz
2.70 GHz
2.80 GHz
——
75
75
75
75
75
75
75
A6
V
TT
FSB termination
voltage
(DC + AC
specifications)
on Intel 3 series
Chipset family boards
1.045 1.1 1.155
V7, 8
on Intel 4 series
Chipset family boards
1.14 1.2 1.26
VTT_OUT_LEFT
and
VTT_OUT_RIGHT
I
CC
DC Current that may be drawn from
VTT_OUT_LEFT and VTT_OUT_RIGHT per
land
——580mA
I
TT
I
CC
for V
TT
supply before V
CC
stable
I
CC
for V
TT
supply after V
CC
stable
——
4.5
4.6
A9
I
CC_VCCPLL
I
CC
for PLL land ——130mA
I
CC_GTLREF
I
CC
for GTLREF — — 200 µA