Datasheet

Datasheet 3
Contents
1Introduction..............................................................................................................9
1.1 Terminology .......................................................................................................9
1.1.1 Processor Terminology Definitions ............................................................ 10
1.2 References .......................................................................................................11
2 Electrical Specifications...........................................................................................13
2.1 Power and Ground Lands....................................................................................13
2.2 Decoupling Guidelines........................................................................................ 13
2.2.1 Vcc Decoupling ...................................................................................... 13
2.2.2 Vtt Decoupling.......................................................................................13
2.2.3 FSB Decoupling......................................................................................13
2.3 Voltage Identification.........................................................................................14
2.4 Reserved, Unused, and TESTHI Signals ................................................................16
2.5 Flexible Motherboard Guidelines (FMB)................................................................. 16
2.6 Power Segment Identifier (PSID).........................................................................17
2.7 Voltage and Current Specification........................................................................17
2.7.1 Absolute Maximum and Minimum Ratings ..................................................17
2.7.2 DC Voltage and Current Specification........................................................18
2.7.3 VCC Overshoot ......................................................................................21
2.7.4 Die Voltage Validation.............................................................................22
2.8 Signaling Specifications......................................................................................22
2.8.1 FSB Signal Groups..................................................................................22
2.8.2 CMOS and Open Drain Signals ................................................................. 24
2.8.3 Processor DC Specifications .....................................................................24
2.8.3.1 Platform Environment Control Interface (PECI) DC Specifications..... 26
2.8.3.2 GTL+ Front Side Bus Specifications ............................................. 26
2.9 Clock Specifications...........................................................................................28
2.9.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking............................ 28
2.9.2 FSB Frequency Select Signals (BSEL[2:0]).................................................29
2.9.3 Phase Lock Loop (PLL) and Filter .............................................................. 29
2.9.4 BCLK[1:0] Specifications.........................................................................30
3 Package Mechanical Specifications ..........................................................................33
3.1 Package Mechanical Specifications.......................................................................33
3.1.1 Package Mechanical Drawing....................................................................34
3.1.2 Processor Component Keep-Out Zones......................................................38
3.1.3 Package Loading Specifications ................................................................ 38
3.1.4 Package Handling Guidelines....................................................................38
3.1.5 Package Insertion Specifications...............................................................39
3.1.6 Processor Mass Specification....................................................................39
3.1.7 Processor Materials................................................................................. 39
3.1.8 Processor Markings.................................................................................39
3.1.9 Processor Land Coordinates..................................................................... 40
4 Land Listing and Signal Descriptions .......................................................................41
4.1 Processor Land Assignments...............................................................................41
4.2 Alphabetical Signals Reference............................................................................ 64
5 Thermal Specifications and Design Considerations .................................................. 75
5.1 Processor Thermal Specifications.........................................................................75
5.1.1 Thermal Specifications............................................................................ 75
5.1.2 Thermal Metrology .................................................................................80