Datasheet
Electrical Specifications
24 Datasheet
.
NOTES:
1. Signals that do not have R
TT
, nor are actively driven to their high-voltage level.
NOTE:
1. See Table 2-10 for more information.
2.8.2 CMOS and Open Drain Signals
Legacy input signals such as A20M#, IGNNE#, INIT#, SMI#, and STPCLK# use CMOS
input buffers. All of the CMOS and Open Drain signals are required to be asserted/
deasserted for at least eight BCLKs in order for the processor to recognize the proper
signal state. See Section 2.8.3 for the DC specifications. See Section 6.2 for additional
timing requirements for entering and leaving the low power states.
2.8.3 Processor DC Specifications
The processor DC specifications in this section are defined at the processor core (pads)
unless otherwise stated. All specifications apply to all frequencies and cache sizes
unless otherwise stated.
Table 2-7. Signal Characteristics
Signals with R
TT
Signals with No R
TT
A[35:3]#, ADS#, ADSTB[1:0]#, BNR#, BPRI#,
D[63:0]#, DBI[3:0]#, DBSY#, DEFER#,
DRDY#, DSTBN[3:0]#, DSTBP[3:0]#, HIT#,
HITM#, LOCK#, PROCHOT#, REQ[4:0]#,
RS[2:0]#, TRDY#
A20M#, BCLK[1:0], BSEL[2:0],
COMP[8,3:0], FERR#/PBE#, IERR#, IGNNE#,
INIT#, ITP_CLK[1:0], LINT0/INTR, LINT1/
NMI, MSID[1:0], PWRGOOD, RESET#, SMI#,
STPCLK#, TDO, TDO_M,
TESTHI[13,11:10,7:0], THERMTRIP#,
VID[6:0], GTLREF[3:0], TCK, TDI, TDI_M,
TMS, TRST#, VTT_SEL
Open Drain Signals
1
THERMTRIP#, FERR#/PBE#, IERR#, BPM[5:0]#,
BPMb[3:0]#, BR0#, TDO, TDO_M, FCx
Table 2-8. Signal Reference Voltages
GTLREF V
TT
/2
BPM[5:0]#, BPMb[3:0]#, RESET#, BNR#, HIT#,
HITM#, BR0#, A[35:0]#, ADS#, ADSTB[1:0]#,
BPRI#, D[63:0]#, DBI[3:0]#, DBSY#, DEFER#,
DRDY#, DSTBN[3:0]#, DSTBP[3:0]#, LOCK#,
REQ[4:0]#, RS[2:0]#, TRDY#
A20M#, LINT0/INTR, LINT1/NMI,
IGNNE#, INIT#, PROCHOT#,
PWRGOOD
1
, SMI#, STPCLK#, TCK
1
,
TDI
1
, TDI_M
1
, TMS
1
, TRST#
1
Table 2-9. GTL+ Signal Group DC Specifications
Symbol Parameter Min Max Unit Notes
1
V
IL
Input Low Voltage -0.10 GTLREF - 0.10 V 2, 6
V
IH
Input High Voltage GTLREF + 0.10 V
TT
+ 0.10 V 3, 4, 6
V
OH
Output High Voltage V
TT
- 0.10 V
TT
V4, 6
I
OL
Output Low Current N/A
V
TT_MAX
/
[(R
TT_MIN
) + (2 * R
ON_MIN
)]
A-