Desktop 4th Generation Specification Sheet
Table Of Contents
- Contents
- Revision History
- 1.0 Introduction
- 2.0 Interfaces
- 3.0 Technologies
- 3.1 Intel® Virtualization Technology (Intel® VT)
- 3.2 Intel® Trusted Execution Technology (Intel® TXT)
- 3.3 Intel® Hyper-Threading Technology (Intel® HT Technology)
- 3.4 Intel® Turbo Boost Technology 2.0
- 3.5 Intel® Advanced Vector Extensions 2.0 (Intel® AVX2)
- 3.6 Intel® Advanced Encryption Standard New Instructions (Intel® AES-NI)
- 3.7 Intel® Transactional Synchronization Extensions - New Instructions (Intel® TSX-NI)
- 3.8 Intel® 64 Architecture x2APIC
- 3.9 Power Aware Interrupt Routing (PAIR)
- 3.10 Execute Disable Bit
- 3.11 Supervisor Mode Execution Protection (SMEP)
- 4.0 Power Management
- 4.1 Advanced Configuration and Power Interface (ACPI) States Supported
- 4.2 Processor Core Power Management
- 4.3 Integrated Memory Controller (IMC) Power Management
- 4.4 PCI Express* Power Management
- 4.5 Direct Media Interface (DMI) Power Management
- 4.6 Graphics Power Management
- 5.0 Thermal Management
- 5.1 Desktop Processor Thermal Profiles
- 5.2 Thermal Metrology
- 5.3 Fan Speed Control Scheme with Digital Thermal Sensor (DTS) 1.1
- 5.4 Fan Speed Control Scheme with Digital Thermal Sensor (DTS) 2.0
- 5.5 Processor Temperature
- 5.6 Adaptive Thermal Monitor
- 5.7 THERMTRIP# Signal
- 5.8 Digital Thermal Sensor
- 5.9 Intel® Turbo Boost Technology Thermal Considerations
- 6.0 Signal Description
- 6.1 System Memory Interface Signals
- 6.2 Memory Reference and Compensation Signals
- 6.3 Reset and Miscellaneous Signals
- 6.4 PCI Express*-Based Interface Signals
- 6.5 Display Interface Signals
- 6.6 Direct Media Interface (DMI)
- 6.7 Phase Locked Loop (PLL) Signals
- 6.8 Testability Signals
- 6.9 Error and Thermal Protection Signals
- 6.10 Power Sequencing Signals
- 6.11 Processor Power Signals
- 6.12 Sense Signals
- 6.13 Ground and Non-Critical to Function (NCTF) Signals
- 6.14 Processor Internal Pull-Up / Pull-Down Terminations
- 7.0 Electrical Specifications
- 8.0 Package Mechanical Specifications
- 9.0 Processor Ball and Signal Information
System Memory Technology Supported
The Integrated Memory Controller (IMC) supports DDR3/DDR3L protocols with two
independent, 64-bit wide channels each accessing one or two DIMMs. The type of
memory supported by the processor is dependent on the PCH SKU in the target
platform.
Note: The IMC supports a maximum of two DDR3/DDR3L DIMMs per channel; thus, allowing
up to four device ranks per channel.
Note: The support of DDR3/DDR3L frequencies and number of DIMMs per channel is SKU
dependent.
Table 3. Processor DIMM Support by Product
Processor Cores Package DIMM per Channel DDR3 / DDR3L
Dual Core uLGA
1 DPC 1333/1600
2 DPC 1333/1600
Quad Core uLGA
1 DPC 1333/1600
2 DPC 1333/1600
DDR3/DDR3L Data Transfer Rates:
• 1333 MT/s (PC3-10600)
• 1600 MT/s (PC3-12800)
AIO platform DDR3/DDR3L SO-DIMM Modules:
• Raw Card B – Single Ranked x8 unbuffered non-ECC
• Raw Card F – Dual Ranked x8 (planar) unbuffered non-ECC
Desktop platform UDIMM Modules:
• Raw Card A – Single Ranked x8 unbuffered non-ECC
• Raw Card B – Dual Ranked x8 unbuffered non-ECC
• Standard 1Gb, 2Gb, and 4Gb technologies and addressing are supported for x8
devices. There is no support for memory modules with different technologies or
capacities on opposite sides of the same memory module. If one side of a memory
module is populated, the other side is either identical or empty.
Table 4. Supported UDIMM Module Configurations
Raw
Card
Version
DIMM
Capacity
DRAM
Device
Technology
DRAM
Organization
# of
DRAM
Devices
# of
Physical
Devices
Ranks
# of
Row / Col
Address
Bits
# of
Banks
Inside
DRAM
Page Size
Desktop Platforms
Unbuffered / Non-ECC Supported DIMM Module Configurations
A 1 GB 1 Gb 128 M X 8 8 1 14/10 8 8K
continued...
2.1.1
Interfaces—Processor
Desktop 4th Generation Intel
®
Core
™
Processor Family, Desktop Intel
®
Pentium
®
Processor Family, and Desktop Intel
®
Celeron
®
Processor Family
December 2013 Datasheet – Volume 1 of 2
Order No.: 328897-004 19