Instructions
Table Of Contents
- AN 496: Using the Internal Oscillator IP Core
- Contents
- Using the Internal Oscillator IP Core
Design Example 2: Targeting a MAX V Device Development Kit
In Design Example 2, the oscillator output frequency is divided by 2
21
before clocking
a 2-bit counter. The output of this 2-bit counter is used to drive the LEDs, thereby
demonstrating the internal oscillator on the MAX V device development kit.
Table 4. 5M570Z Pin Assignments for Design Example 2 Using the MAX V Device
Development Kit
5M570Z Pin Assignments
Signal Pin Signal Pin
pb0
M9
LED[0]
P4
osc
M4
LED[1]
R1
clk
P2 — —
To demonstrate this design on the MAX V development kit, follow these steps:
1. Plug in the USB cable into the USB Connector to power up the device.
2. Download the design onto the MAX V device through the embedded Intel FPGA
Download Cable.
3.
Observe the blinking LEDs (LED[0] and LED[1]). Pressing pb0 on the demo
board disables the internal oscillator and the blinking LEDs will freeze at their
current state.
Document Revision History for AN 496: Using the Internal
Oscillator IP Core
Date Version Changes
November 2017 2017.11.06 • Added support for the following devices:
— Cyclone III
— Cyclone IV
— Cyclone V
— Intel Cyclone 10 GX
— Intel Cyclone 10 LP
— Arria II GX
— Arria V
— Intel Arria 10
— Stratix V
— Intel Stratix 10
• Changed the document title from Using the Internal
Oscillator in Altera MAX Series to Using the Internal
Oscillator IP Core to include other supported devices.
• Rebranded as Intel.
November 2014 2014.11.04 Updated the frequency for undivided internal oscillator and
output clock from internal oscillator frequency values for
MAX 10 devices in the Frequency Range for Supported
Altera Devices table.
September 2014 2014.09.22 Added MAX 10 devices.
January 2011 2.0 Updated to include MAX V devices.
December 2007 1.0 Initial release.
Using the Internal Oscillator IP Core
683653 | 2017.11.06
AN 496: Using the Internal Oscillator IP Core
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