Instructions
Table Of Contents
- AN 496: Using the Internal Oscillator IP Core
- Contents
- Using the Internal Oscillator IP Core
Figure 1. Internal Oscillator as Part of the UFM for MAX II and MAX V Devices
PROGRAM
ERASE
oscena
ARCLK
ARSHFT
ARDin
DRDin
DRCLK
DRSHFT
Address
Register
Program Erase
Control
UFM Block
osc
4
UFM Sector 1
UFM Sector 0
RPT_BUSY
BUSY
osc
DRDout
Data Register
9
16
16
The internal oscillator is part of the Program Erase Control block, which controls the
programming and erasing of the UFM. The data register holds the data to be sent or
retrieved from the UFM. The address register holds the address from which data is
retrieved or the address to which the data is written.
The internal oscillator for the UFM block is enabled when the ERASE, PROGRAM, and
READ operation is executed.
Table 2. Pin Description for the Internal Oscillator IP Core
Signal Description
oscena
Use to enable the internal oscillator. Input high to enable the oscillator.
osc/clkout
(5)
Output of the internal oscillator.
Using the Internal Oscillator IP Core
683653 | 2017.11.06
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AN 496: Using the Internal Oscillator IP Core
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