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ALTERA_CORDIC IP Core User Guide

Online Version

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UG-20017

ID: 683808

Version: 2017.05.08

Summary of content (10 pages)

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ALTERA_CORDIC IP Core User Guide ID: 683808 Online Version Send Feedback UG-20017 Version: 2017.05.
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Contents Contents 1. ALTERA_CORDIC IP Core User Guide.............................................................................. 3 1.1. ALTERA_CORDIC IP Core Features........................................................................... 3 1.2. DSP IP Core Device Family Support.......................................................................... 3 1.3. ALTERA_CORDIC IP Core Functional Description.........................................................4 1.3.1. SinCos Function...................
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683808 | 2017.05.08 Send Feedback 1. ALTERA_CORDIC IP Core User Guide Use the ALTERA_CORDIC IP core to implement a set of fixed-point functions with the CORDIC algorithm. ALTERA_CORDIC IP Core Features on page 3 DSP IP Core Device Family Support on page 3 ALTERA_CORDIC IP Core Functional Description on page 4 ALTERA_CORDIC IP Core Parameters on page 7 ALTERA_CORDIC IP Core Signals on page 9 1.1. ALTERA_CORDIC IP Core Features • Supports fixed-point implementations.
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1. ALTERA_CORDIC IP Core User Guide 683808 | 2017.05.08 Table 1. DSP IP Core Device Family Support Device Family Support Arria® II GX Final Arria II GZ Final Arria V Final Intel® Arria 10 Final Cyclone® IV Final Cyclone V Final Intel MAX® 10 FPGA Final Stratix® IV GT Final Stratix IV GX/E Final Stratix V Final Intel Stratix 10 Advance Other device families No support 1.3.
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1. ALTERA_CORDIC IP Core User Guide 683808 | 2017.05.08 The function supports two configurations, depending on the sign attribute of a: • If a is signed, the allowed input range is [-π,+π] and the output range for the sine and cosine is ฀[−1,1]. • If a is unsigned, the IP core restricts the input to [0,+π/2] and restricts the output range to [0,1]. 1.3.2. Atan2 Function Computes the function atan2(y, x) from inputs y and x. Figure 2.
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1. ALTERA_CORDIC IP Core User Guide 683808 | 2017.05.08 The function takes inputs x and y and outputs a=atan2(y, x) and M = K( x2+y2)0.5. M is the magnitude of the input vector v=(x,y)T, scaled by a CORDIC specific constant that converges to 1.646760258121, which is transcendental, hence has no fixed value. The functions supports two configurations, depending on the sign attribute of x and y: • If the inputs are signed, the formats give the allowed input range.
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1. ALTERA_CORDIC IP Core User Guide 683808 | 2017.05.08 1.4. ALTERA_CORDIC IP Core Parameters Table 2. SinCos Parameters Parameter Values Description Input data widths Fraction F 1 to 64 Number of fraction bits. Width w Derived Width of fixed-point data. Sign signed or unsigned The sign of the fixed-point data. Output data widths Fraction 1 to 64, where FOUT ≤ FIN Number of fraction bits. Width Derived Width of fixed-point data. Sign Derived The sign of the fixed-point data.
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1. ALTERA_CORDIC IP Core User Guide 683808 | 2017.05.08 Parameter Sign Values signed or unsigned Description The sign of the fixed-point data Output data widths Fraction 1 to 64 Number of fraction bits. Width Derived Width of fixed-point data. Sgn Derived The sign of the fixed-point data Generate enable port On or off Turn on for enable signal. Scale factor compensation On or off For vector translate, a CORDIC specific constant that converges to 1.6467602...
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1. ALTERA_CORDIC IP Core User Guide 683808 | 2017.05.08 Parameter Values Description K~1.6467602...), or ~[-2.32, +2.32]. Representing the values in this interval requires 3 bits left of the binary point, one of which is for the sign. When you turn on Scale factor compensation, the output interval becomes [-20.5, +20.5] or ~[-1.41, 1.41], which requires two bits left of the binary point, one of which is for the sign. Scale factor compensation affects the total width of the output. 1.5.
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1. ALTERA_CORDIC IP Core User Guide 683808 | 2017.05.08 Table 9. Name Vector Translate Functions Signals Direction x, y Input q Output Configurati on Signed input Range Given by w, F Specifies the total width (w) and number fractional bits (F) of the input. Provide the inputs in two’s complement form. [−π,+π] Computes atan2(y,x) on a user-specified output fraction width Fq. The output has the width wq=Fq+3 and is signed. Given by w, F r Details Computes K(x2+y2)0.5.