Datasheet

Datasheet, Volume 2 63

Processor Configuration Registers

2.5.19 MESEG_BASE—Intel

Management Engine Base Address

This register determines the Base Address register of the memory range that is pre-

allocated to the Intel Management Engine. Together with the MESEG_MASK register it

controls the amount of memory allocated to the ME.

This register must be initialized by the configuration software. For the purpose of

address decode, address bits A[19:0] are assumed to be 0. Thus, the bottom of the

defined memory address range will be aligned to a 1 MB boundary.

This register is locked by Intel TXT.

Note: BIOS must program MESEG_BASE and MESEG_MASK so that Intel ME stolen Memory is

carved out from TOM.

B/D/F/Type: 0/0/0/PCI

Address Offset: 70–77h

Reset Value: 0000007FFFF00000h

Access: RW-L

Size: 64 bits

BIOS Optimal Default 000000000000h

Bit Access

Reset

Value

RST/

PWR

Description

63:39 RO 0h Reserved (RSVD)

38:20 RW-L 7FFFFh Uncore

ME UMA Memory Base Address (MEBASE)

This field corresponds to A[38:20] of the base address memory

range that is allocated to the ME.

19:0 RO 0h Reserved (RSVD)