Datasheet

Datasheet, Volume 2 5
2.6.26 PM_CS—Power Management Control/Status Register ............................. 105
2.6.27 SS_CAPID—Subsystem ID and Vendor ID Capabilities Register................ 107
2.6.28 SS—Subsystem ID and Subsystem Vendor ID Register........................... 107
2.6.29 MSI_CAPID—Message Signaled Interrupts Capability ID Register ............. 108
2.6.30 MC—Message Control Register ............................................................ 109
2.6.31 MA—Message Address Register ........................................................... 110
2.6.32 MD—Message Data Register ............................................................... 110
2.6.33 PEG_CAPL—PCI Express-G Capability List Register................................. 110
2.6.34 PEG_CAP—PCI Express-G Capabilities Register ...................................... 111
2.6.35 DCAP—Device Capabilities Register...................................................... 111
2.6.36 DCTL—Device Control Register............................................................ 112
2.6.37 DSTS—Device Status Register............................................................. 113
2.6.38 LCAP—Link Capabilities Register.......................................................... 114
2.6.39 LCTL—Link Control Register ................................................................ 116
2.6.40 LSTS—Link Status Register................................................................. 118
2.6.41 SLOTCAP—Slot Capabilities Register .................................................... 119
2.6.42 SLOTCTL—Slot Control Register .......................................................... 121
2.6.43 SLOTSTS—Slot Status Register ........................................................... 123
2.6.44 RCTL—Root Control Register............................................................... 125
2.6.45 RSTS—Root Status Register................................................................ 126
2.6.46 DCAP2—Device Capabilities 2 Register ................................................. 127
2.6.47 DCTL2—Device Control 2 Register ....................................................... 128
2.6.48 LCAP2—Link Capabilities 2 Register ..................................................... 129
2.6.49 LCTL2—Link Control 2 Register ........................................................... 129
2.6.50 LSTS2—Link Status 2 Register ............................................................ 131
2.7 PCI Device 1 Function 0–2 Extended Configuration Registers................................. 132
2.7.1 PVCCAP1—Port VC Capability Register 1 ............................................... 133
2.7.2 PVCCAP2—Port VC Capability Register 2 ............................................... 133
2.7.3 PVCCTL—Port VC Control Register ....................................................... 134
2.7.4 VC0RCAP—VC0 Resource Capability Register......................................... 135
2.7.5 VC0RCTL—VC0 Resource Control Register............................................. 136
2.7.6 VC0RSTS—VC0 Resource Status Register ............................................. 137
2.7.7 PEG_TC—PCI Express* Completion Timeout Register ............................. 137
2.7.8 EQCTL0_1—Lane 0/1 Equalization Control Register ................................ 138
2.7.9 EQCTL2_3—Lane 2/3 Equalization Control Register ................................ 139
2.7.10 EQCTL4_5—Lane 4/5 Equalization Control Register ................................ 140
2.7.11 EQCTL6_7—Lane 6/7 Equalization Control Register ................................ 141
2.7.12 EQCTL8_9—Lane 8/9 Equalization Control Register ................................ 142
2.7.13 EQCTL10_11—Lane 10/11 Equalization Control Register ......................... 143
2.7.14 EQCTL12_13—Lane 12/13 Equalization Control Register ......................... 144
2.7.15 EQCTL14_15—Lane 14/15 Equalization Control Register ......................... 145
2.7.16 EQCFG—Equalization Configuration Register ......................................... 146
2.8 PCI Device 2 Configuration Space Registers ........................................................ 148
2.8.1 VID2—Vendor Identification Register ................................................... 149
2.8.2 DID2—Device Identification Register.................................................... 149
2.8.3 PCICMD2—PCI Command Register....................................................... 150
2.8.4 PCISTS2—PCI Status Register............................................................. 151
2.8.5 RID2—Revision Identification Register.................................................. 152
2.8.6 CC—Class Code Register .................................................................... 152
2.8.7 CLS—Cache Line Size Register ............................................................ 153
2.8.8 MLT2—Master Latency Timer Register .................................................. 153
2.8.9 HDR2—Header Type Register.............................................................. 153
2.8.10 GTTMMADR—Graphics Translation Table, Memory
Mapped Range Address Register.......................................................... 154
2.8.11 GMADR—Graphics Memory Range Address Register ............................... 155
2.8.12 IOBAR—I/O Base Address Register ...................................................... 156