Datasheet

Datasheet, Volume 2 297
Processor Configuration Registers
2.19.1 MEM_TRML_ESTIMATION_CONFIG—Memory
Thermal Estimation Configuration Register
This register contains configuration regarding VTS temperature estimation calculations
that are done by PCODE.
B/D/F/Type: 0/0/0/MCHBAR PCU
Address Offset: 5880–5883h
Reset Value: CA9171E7h
Access: RW
Size: 32 bits
BIOS Optimal Default CA9171E7h
Bit Access
Reset
Value
RST/
PWR
Description
31:22 RW 10Eh Uncore
VTS multiplier (VTS_MULTIPLIER)
The VTS multiplier serves as a multiplier for the translation of the
memory BW to temperature. The units are given in
1 / power(2,44).
21:12 RW 0C8h Uncore
VTS time constant (VTS_TIME_CONSTANT)
This factor is relevant only for BW based temperature estimation.
It is equal to "1 minus alpha".
The value of the time constant (1 – alpha) is determined by
VTS_TIME_CONSTANT / power(2,25) per 1 mSec.
11 RO 0h Reserved (RSVD)
10:4 RW 32h Uncore
VTS offset adder (VTS_OFFSET)
The offset is intended to provide a temperature proxy offset, so
the option of having a fixed adder to VTS output is available.
3RO 0h Reserved (RSVD)
2RW 1bUncore
Disable EXTTS# (DISABLE_EXTTS)
When set, the processor will ignore the EXTTS# signal status that
it receives from the PCH through PM_SYNC messaging.
0 = Enable
1 = Disable
1RW 0bUncore
Disable virtual Temperature Sensor (DISABLE_VTS)
When set, the processor will ignore the VTS.
0 = Enable
1 = Disable
0RW 0bUncore
Disable PECI Injected Temperature
(DISABLE_PECI_INJECT_TEMP)
When set, the processor will ignore any DRAM temperature
written to it over the PECI bus.
0 = Enable
1 = Disable