Datasheet

Processor Configuration Registers
296 Datasheet, Volume 2
2.19 PCU MCHBAR Registers
Table 2-22. PCU MCHBAR Register Address Map
Address
Offset
Register Symbol Register Name Reset Value Access
0–587Fh RSVD Reserved — —
5880–5883h
MEM_TRML_ESTI
MATION_CONFIG
Memory Thermal Estimation
Configuration
CA9171E7h RW
5884–5887h RSVD Reserved 00000000h RW
5888–588Bh
MEM_TRML_THRE
SHOLDS_CONFIG
Memory Thermal Thresholds
Configuration
00E4DAD0h RW
588C–589Fh RSVD Reserved — —
58A0–58A3h
MEM_TRML_STAT
US_REPORT
Memory Thermal Status Report
00000000h RO-V
58A4–58A7h
MEM_TRML_TEMP
ERATURE_REPORT
Memory Thermal Temperature
Report
00000000h RO-V
58A8–58ABh
MEM_TRML_INTER
RUPT
Memory Thermal Interrupt
00000000h RW
58AC–5947h RSVD Reserved — —
5948–594Bh GT_PERF_STATUS GT Performance Status 00000000h RO-V
594C–5993h RSVD Reserved — —
5994–5997h RP_STATE_LIMITS RP-State Limitations 000000FFh RW
5998–599Bh RP_STATE_CAP RP State Capability 00000000h RO-FW
599C–5C1Fh RSVD Reserved — —
5C20–5C23h
PCU_MMIO_FREQ
_CLIPPING_CAUS
E_STATUS
PCU MMIO Frequency Clipping
Cause Status
00000000h RW
5C24–5C27h
PCU_MMIO_FREQ
_CLIPPING_CAUS
E_LOG
PCU MMIO Frequency Clipping
Cause Log
00000000h RW
5C28–5D0Fh RSVD Reserved — —
5D10–5D17h SSKPD
Sticky Scratchpad Data 00000000000
00000h
RWS, RW
5D18–5F03h RSVD Reserved — —