Datasheet

Datasheet, Volume 2 229

Processor Configuration Registers

2.12.18 DMIESD—DMI Element Self Description Register

This register provides information about the root complex element containing this Link

Declaration Capability.

B/D/F/Type: 0/0/0/DMIBAR

Address Offset: 44–47h

Reset Value: 01000202h

Access: RO, RW-O

Size: 32 bits

BIOS Optimal Default 0h

Bit Access

Reset

Value

RST/

PWR

Description

31:24 RO 01h Uncore

Port Number (PORTNUM)

This field specifies the port number associated with this element

with respect to the component that contains this element. This

port number value is utilized by the egress port of the component

to provide arbitration to this Root Complex Element.

23:16 RW-O 00h Uncore

Component ID (CID)

This field identifies the physical component that contains this

Root Complex Element.

BIOS Requirement: This field must be initialized according to

guidelines in the PCI Express* Isochronous/Virtual Channel

Support Hardware Programming Specification (HPS).

15:8 RO 02h Uncore

Number of Link Entries (NLE)

This field indicates the number of link entries following the

Element Self Description. This field reports 2 (one for MCH egress

port to main memory and one to egress port belonging to ICH on