Datasheet

Datasheet, Volume 2 209
Processor Configuration Registers
2.11.8 ESD—Element Self Description Register
This register provides information about the root complex element containing this Link
Declaration Capability.
B/D/F/Type: 0/6/0/MMR
Address Offset: 144–147h
Reset Value: 05000100h
Access: RO, RW-O
Size: 32 bits
BIOS Optimal Default 0h
Bit Access
Reset
Value
RST/
PWR
Description
31:24 RO 05h Uncore
Port Number (PN)
Specifies the port number associated with this element with
respect to the component that contains this element.
Note the value is instantiation dependent:
BDF 0.1.0 --> 02
BDF 0.1.1 --> 03
BDF 0.1.2 --> 04
BDF 0.6.0 --> 05
23:16 RW-O 00h Uncore
Component ID (CID)
Identifies the physical component that contains this Root
Complex Element.
BIOS Requirement: This field must be initialized according to
guidelines in the PCI Express* Isochronous/Virtual Channel
Support Hardware Programming Specification (HPS).
15:8 RO 01h Uncore
Number of Link Entries (NLE)
Indicates the number of link entries following the Element Self
Description. This field reports 1 (to Egress port only).
7:4 RO 0h Reserved (RSVD)
3:0 RO 0h Uncore
Element Type (ET)
Indicates Configuration Space Element.