Datasheet

Processor Configuration Registers
178 Datasheet, Volume 2
2.10.21 CAPPTR—Capabilities Pointer Register
The capabilities pointer provides the address offset to the location of the first entry in
this device's linked list of capabilities.
2.10.22 INTRLINE—Interrupt Line Register
This register contains interrupt line routing information. The device itself does not use
this value; rather it is used by device drivers and operating systems to determine
priority and vector information.
B/D/F/Type: 0/6/0/PCI
Address Offset: 34h
Reset Value: 88h
Access: RO
Size: 8 bits
Bit Access
Reset
Value
RST/
PWR
Description
7:0 RO 88h Uncore
First Capability (CAPPTR1)
The first capability in the list is the Subsystem ID and Subsystem
Vendor ID Capability.
B/D/F/Type: 0/6/0/PCI
Address Offset: 3Ch
Reset Value: 00h
Access: RW
Size: 8 bits
Bit Access
Reset
Value
RST/
PWR
Description
7:0 RW 00h Uncore
Interrupt Connection (INTCON)
This field is used to communicate interrupt line routing
information.
BIOS Requirement: POST software writes the routing
information into this register as it initializes and configures the
system. The value indicates to which input of the system
interrupt controller this device's interrupt pin is connected.