Datasheet

Datasheet, Volume 2 161
Processor Configuration Registers
2.10 PCI Device 6 Registers
Table 2-13. PCI Device 6 Register Address Map (Sheet 1 of 2)
Address
Offset
Register
Symbol
Register Name Reset Value Access
0–1h VID Vendor Identification 8086h RO
2–3h DID Device Identification 015Dh RO-FW
4–5h PCICMD PCI Command 0000h RW, RO
6–7h PCISTS
PCI Status
0010h
RW1C, RO, RO-
V
8h RID Revision Identification 00h RO-FW
9–Bh CC Class Code 060400h RO
Ch CL Cache Line Size 00h RW
Dh RSVD Reserved 0h RO
Eh HDR Header Type 81h RO
Fh RSVD Reserved 0h RO
18h PBUSN Primary Bus Number 00h RO
19h SBUSN Secondary Bus Number 00h RW
1Ah SUBUSN Subordinate Bus Number 00h RW
1Bh RSVD Reserved 0h RO
1Ch IOBASE I/O Base Address F0h RW
1Dh IOLIMIT I/O Limit Address 00h RW
1E–1Fh SSTS Secondary Status 0000h RW1C, RO
20–21h MBASE Memory Base Address FFF0h RW
22–23h MLIMIT Memory Limit Address 0000h RW
24–25h PMBASE Prefetchable Memory Base Address FFF1h RW, RO
26–27h PMLIMIT Prefetchable Memory Limit Address 0001h RW, RO
28–2Bh PMBASEU
Prefetchable Memory Base Address
Upper
00000000h RW
2C–2Fh PMLIMITU
Prefetchable Memory Limit Address
Upper
00000000h RW
30–33h RSVD Reserved 0h RO
34h CAPPTR Capabilities Pointer 88h RO
35–3Bh RSVD Reserved 0h RO
3Ch INTRLINE Interrupt Line 00h RW
3Dh INTRPIN Interrupt Pin 01h RW-O, RO
3E–3Fh BCTRL Bridge Control 0000h RO, RW
40–7Fh RSVD Reserved 0h RO
80–83h PM_CAPID Power Management Capabilities C8039001h RO, RO-V
84–87h PM_CS Power Management Control/Status 00000008h RO, RW
88–8Bh SS_CAPID
Subsystem ID and Vendor ID
Capabilities
0000800Dh RO
8C–8Fh SS
Subsystem ID and Subsystem Vendor
ID
00008086h RW-O