Intel Pentium D Processor 800 Sequence and Intel Pentium Processor Extreme Edition 840 Specification Update

Summary Tables of Changes
R
Intel
®
Pentium
®
Processor Extreme Edition and
Intel
®
Pentium
®
D Processor Specification Update 13
NO. A0 B0 Plan ERRATA
F53 X X Plan Fix
It is Possible That Two specific Invalid Opcodes May Cause Unexpected
Memory Accesses
F54 X X No Fix
At Core-to-bus Ratios of 16:1 and Above Defer Reply Transactions with
Non-zero REQb Values May Cause a Front Side Bus Stall
F55 X X No Fix
The Processor May Issue Front Side Bus Transactions up to 6 Clocks
after RESET# is Asserted
F56 X X No Fix
Front Side Bus Machine Checks May be Reported as a Result of On-
Going Transactions during Warm Reset
F57 X X No Fix
Writing the Local Vector Table (LVT) when an Interrupt is Pending May
Cause an Unexpected Interrupt
F58 X Plan Fix
CPUID Feature Flag Reports LAHF/SAHF as Unavailable however the
Execution of LAHF/SAHF May Not Result in an Invalid Opcode
Exception
F59 X X No Fix
IRET under Certain Conditions May Cause an Unexpected Alignment
Check Exception
F60 X X No Fix
L2 Cache ECC Machine Check Errors May be erroneously Reported
after an Asynchronous RESET# Assertion
F61 X X No Fix
Using 2M/4M Pages When A20M# Is Asserted May Result in Incorrect
Address Translations
F62 X X No Fix
Writing Shared Unaligned Data that Crosses a Cache Line without
Proper Semaphores or Barriers May Expose a Memory Ordering Issue
F63 X X No Fix
The IA32_MC0_STATUS and IA32_MC1_STATUS Overflow Bit is not
set when Multiple Un-correctable Machine Check Errors Occur at the
Same Time
F64 X X No Fix
Debug Status Register (DR6) Breakpoint Condition Detected Flags May
be set Incorrectly
F65 X X No Fix
A Continuous Loop Executing Bus Lock Transactions on One Logical
Processor may Prevent Another Logical Processor from Acquiring
Resources
NOTES:
1. This erratum applies only to Intel Pentium processor Extreme Edition with Hyper-Threading Technology
Enabled.
NO Plan SPECIFICATION CHANGES
There are no specification changes in this specification update revision
NO Plan SPECIFICATION CLARIFICATIONS
There are no specification clarification in this specification update revision
NO Plan DOCUMENTATION CHANGES
There are no documentation changes in this specification update revision
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