User's Manual

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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15.4.1.4. OBUF_0V—Overlay Buffer 0 V Pointer Register
Memory Address Offset: 0Ch (R/W)
On-chip Reg. Mem Addr Offset: 3010Ch (RO; debug path)
Default Value: 00h
Access: see address offset above
Size: 32 bits
31 26 25 0
Reserved Overlay Buffer 0 V Pointer
Bit Description
31:26 Reserved.
25:0 Overlay Buffer 0 V Pointer. This register is used for YUV Planar Modes only. It points to the start of
the V addresses in the interleaved UV formats (byte address).
15.4.1.5. OBUF_1U—Overlay Buffer 1 U Pointer Register
Memory Address Offset: 10h (R/W)
On-chip Reg. Mem Addr Offset: 30110h (RO; debug path)
Default Value: 00h
Access: see address offset above
Size: 32 bits
31 26 25 0
Reserved Overlay Buffer 1 U Pointer
Bit Descriptiont
31:26 Reserved.
25:0 Overlay Buffer 1 U Pointer. This register is used for YUV Planar Modes only. It points to the start of
the U addresses in the interleaved UV formats (byte address).