User's Manual

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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9.6.28. CR24

 Test Register for Toggle State of Attribute Controller
Register
I/O (and Memory Offset) Address: 3B5h/3D5h (index=24h)
Default: 00h
Attributes: Read Only
7 6 0
Toggle
Status
Reserved (0000000)
Bit Description
7 Toggle Status. Last write to attribute register was to:
0 = index port
1 = data port
6:0 Reserved. Read as 0s.
9.6.29. CR30

Extended Vertical Total Register
I/O (and Memory Offset) Address: 3B5h/3D5h (index=30h)
Default: 00h
Attributes: Read/Write
7 4 3 0
Reserved (0000) Vertical Total Bits 11:8
Bit Description
7:4 Reserved. Read as 0s. This field must be 0s when this register is written.
3:0 Vertical Total Bits [11:8]. The vertical total is a 10-bit or 12-bit value that specifies the total number of
scan lines. This includes the scan lines both inside and outside of the active display area.
In standard VGA modes, where bit 0 of the I/O Control Register (CR80) is set to 0, the vertical total is
specified with a 10-bit value. The 8 least significant bits of this value are supplied by bits [7:0] of the
Vertical Total Register (CR06), and the 2 most significant bits are supplied by bits 5 and 0 of the
Overflow Register (CR07). In standard VGA modes, these 4 bits of this register are not used.
In extended modes, where bit 0 of the I/O Control Register (CR80) is set to 1, the vertical total is
specified with a 12-bit value. The 8 least significant bits of this value are supplied by bits [7:0] of the
Vertical Total Register (CR06), and the 4 most significant bits are supplied by these 4 bits of this
register.
This 10-bit or 12-bit value should be programmed to be equal to the total number of scan lines, minus 2.