Intel 186 EB/EC Evaluation Board User’s Manual 80C186EC/80C188EC 80L186EC/80L188EC and 80C186EB/80C188EB 80L186EB/80L188EB March 1997 Order Number: 272986-001
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document.
CONTENTS CHAPTER 1 ABOUT THIS MANUAL 1.1 CONTENT OVERVIEW ................................................................................................. 1-1 1.2 NOTATION CONVENTIONS ......................................................................................... 1-2 1.3 RELATED DOCUMENTS .............................................................................................. 1-3 1.4 ELECTRONIC SUPPORT SYSTEMS ...........................................................................
CONTENTS CHAPTER 4 INTRODUCTION TO THE SOFTWARE 4.1 SOFTWARE FEATURES .............................................................................................. 4-1 4.2 RESTRICTIONS ............................................................................................................ 4-2 4.3 EMBEDDED CONTROLLER MONITOR (ECM)............................................................ 4-2 4.4 USER INTERFACE............................................................................................
CONTENTS CHAPTER 6 iRISM-186 COMMANDS 6.1 IRISM VARIABLES........................................................................................................ 6-1 6.1.1 Other Variables .........................................................................................................6-1 6.2 RISM STRUCTURE....................................................................................................... 6-2 6.3 RECEIVING DATA FROM THE HOST........................................................
CONTENTS FIGURES 2-1 2-2 3-1 3-2 3-3 3-4 3-5 3-6 3-7 Intel 186 EB Evaluation Board Layout..........................................................................2-1 Intel 186 EC Evaluation Board Layout .........................................................................2-2 Physical Memory Map ..................................................................................................3-4 Jumper Assembly for Flash Downloading ....................................................................
A About This Manual 1
CHAPTER 1 ABOUT THIS MANUAL 1 This manual describes how to set up and use the Intel 186 EB/EC Evaluation Board. The board is used to evaluate hardware and software performance and provide an “emulation-like” feel when executing and debugging user-written code. This board operates at either 3.3 volts or 5.0 volts. It supports the following processors: • • • • 80C186EB/80C188EB 80L186EB/80L188EB 80C186EC/80C188EC 80L186EC/80L188EC. The 3.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 1.2 NOTATION CONVENTIONS The following notation conventions are used in this manual. # Pound symbol (#) appended to a signal name indicates that the signal is active low. italics Italics identify variables and indicate new terms. bold sans-serif In text, identifies commands (instructions). typewriter This font is used for code examples. All characters are equal width; this is useful for maintaining accurate character spacing.
ABOUT THIS MANUAL 1.3 RELATED DOCUMENTS You can order Intel product literature from the following Intel literature centers. 1-800-548-4725 708-296-9333 44(0)1793-431155 44(0)1793-421333 44(0)1793-421777 81(0)120-47-88-32 1 U.S. and Canada U.S. (from overseas) Europe (U.K.) Germany France Japan (fax only) The following documents may be useful for designing applications using this evaluation board.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 1.4 ELECTRONIC SUPPORT SYSTEMS Intel’s FaxBack* service provides up-to-date technical information. Intel also offers a variety of information on the World Wide Web. These systems are available 24 hours a day, 7 days a week, providing technical information whenever you need it. 1.4.1 FaxBack Service FaxBack is an on-demand publishing system that sends documents to your fax machine.
ABOUT THIS MANUAL 1.5 TECHNICAL SUPPORT Table 1-1.
2 Getting Started
CHAPTER 2 GETTING STARTED This chapter describes the Intel 186 EC/EB Evaluation Board kit, and provides setup instructions. Figure 2-1 shows the 80x186 EB Evaluation Board layout, and Figure 2-2 shows the EC board layout. Refer to these figures when you are following the instructions in this chapter for setting up your evaluation board.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL A B C C33 C8 E1 +5V GND C21 R11 5V/3V Select C30 C31 R2 J1 C19 J2 C32 P1 C20 U6 C22 R3 L2 L3 U2 TP7 U13 GND C25 P2 C2 U7 C12 C3 C9 C5 Y1 C13 R8 R7 U4 R9 TP1 TP2 TP3 TP4 TP5 C6 C10 TP6 GND C4 L1 U3 D1 R4 FLASH PWRDN Q1 E4 E5 C7 R5 A B C A B C C29 C17 R10 C18 S1 R1 U10 DCE Conntector C11 VPP SELECT RP1 U9 186/188 SELECT U5 D C16 ABC C28 C23 C34 T1OUT T0OUT VCC P3.0 P3.1 P3.2 P3.3 P3.4 P3.
GETTING STARTED 2.1 SYSTEM REQUIREMENTS • IBM* PC AT, XT or BIOS-compatible computer host system (interfaces via COM1 or COM2 at 9600 baud). • 5 V power supply (the connector housing and contact pins are included in the kit). 2.2 2 WHAT’S IN YOUR KIT Evaluation Board Your kit includes a board with either a 3.3 volt, 16 MHz 80L186EB or 80L186EC microprocessor installed.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 2.3 VIEWING THE BOARD SCHEMATICS The schematics provided on the diskette are in the Adobe* Acrobat .pdf format. You can view and print the schematics using the Acrobat Reader. The Reader is available at no charge from the Intel World Wide Web site (http://www.intel.com/) or from the Adobe site (http://www.adobe.com/). 2.4 SETTING UP THE EVALUATION BOARD AND THE HOST PC This section tells you how to set up the board for use with a host PC.
GETTING STARTED 4. Apply power to the host PC and the evaluation board. When power is applied to the board, the message “i186 Ex 3V/5V EV” should appear across the LCD display. This message indicates board initialization is complete. If the message does not appear, press the reset button (S1). Connect one end of the standard 9-pin AT-type serial connector to header P1 on the evaluation board. Connect the other end to the COM1 port of the host computer.
3 Hardware Overview
HARDWARE OVERVIEW CHAPTER 3 HARDWARE OVERVIEW The evaluation board comes with a 16 MHz 80L186 EB or EC processor, 512 Kbytes of Flash (containing the iRISM-186 monitor and a Flash loader utility in the boot block), and 256 Kbytes of SRAM. The expansion connector (JP1) supports up to 1 Mbyte of external memory and 64 Kbytes of external I/O. Refer to Figures 2-1 and 2-2 for the exact locations of connectors, jumpers and headers listed in this chapter.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 3.2 MICROPROCESSOR The core of the evaluation board is the 80x186 microprocessor. This processor operates at 3.3 volts up to 16 MHz in this board. Alternatively, the board can be configured to run at 5 volts up to 33 MHz. To vary the CPU clock speed, an appropriate frequency value oscillator must be installed at location U3 on the EC board and at location U5 on the EB board. The oscillator operates at twice the frequency of the installed processor.
HARDWARE OVERVIEW 3.3 MEMORY CONFIGURATION The memory on the evaluation board can be divided into three types: Flash, SRAM, and expansion. Flash memory contains the Flash loader utility, located in the boot block boundary, and the RISM monitor program, beginning at F800:0000. Users can execute their test code from boot-up using the Flash loader utility. Refer to the CQI Flash Loader Reference Manual for instructions on programming the Flash memory.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL Memory Space IO Space UCS Flash 512 K Peripheral Control Block 64 K FFFFFH Flash Loader Utility* (16 K) FC000H FFFFFH LCD Control 1 Meg 80000H GCS5 LCS 40000H LCS 20000H FFFFH FF00H 0440H 0400H Expansion 256 K Unused SRAM 128 K 00000H UCS — Upper Chip Select Start: 80000H Stop: FFFFF Interrupt Vector Table at 00000H to 003FFH (1 K) (Flash 512 K) • 3 Wait States • Active for Memory Bus Cycles • Bus Ready Not Required LCS — Lower Chip Sele
HARDWARE OVERVIEW 3.3.1 Flash (Program Memory) Flash memory, as configured in the RISM monitor, is mapped to the upper 512 Kbytes of the 1 Mbyte 80x186 processor address space. The board includes a single 4 Mbit, 32-pin PSOP Flash device at location U9 with 110 ns access time at 3.3 V and 60 ns access time at 5 V. This memory runs with one wait state at 5 volts/20 MHz and 3.3 volts/16 MHz.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL VCC T1OUT T0OUT GND P2.2 P2.3 BCLK0 Jumper Wire P2.6 10K ohm P2.7 GND +5V +12V Jumper Wire VCC T0IN T1IN GND INT0 INT1 INT2 INT3 INT4 GND GCS6# GCS7# 186 EB Connector JP2 JP2 T0IN T1IN VCC INT0 INT1 INT2 INT3 INT4 INT5 INT6 INT7 INTA# GND DRQ0 DRQ1 DRQ2 DRQ3 GND GCS6# GCS7# T1OUT T0OUT VCC P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 WDTOUT# GND BCLK0 P2.3 RXD1 TXD1 P2.
HARDWARE OVERVIEW If this text does not display on the LED, indicating a problem with the jumper assembly, the board boots as if no Flash loader assembly is installed; that is, the Flash target program immediately starts the loaded user application program (for example, the iRISM monitor software). You can find complete instructions for using the Flash utility program in the CQI Flash Loader User Manual included in your kit. 3.3.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 3.5 POWER SUPPLY The power supply connects to J2 on the board schematic. Pin 1 must connect to +5 volts and pin 2 must connect to ground. The supply is then regulated to 3.3 volts by the on-board circuitry. The VCC for the board is controlled by jumper E1. When E1 is in the A–B position, VCC = 3.3 volts; when E1 is in the B–C position, VCC = 5.0 volts. VCC is converted to +12 volts for optional Flash programming voltage. E1 A A – B VCC = 3.
HARDWARE OVERVIEW The Maxim MAX734 located at U11 is also a current-mode DC-DC converter. This device steps up the VCC voltage to +12.0 volts. This voltage output is supplied to provide a VPP option for Flash memory programming. The SHDN# input (pin 1) connects to a port pin (P1.1) on the processor through an inverter. At reset, SHDN# is driven low to disable the +12 volt signal. The output remains disabled until Port Pin 1.1 is programmed to a logic 0.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL Table 3-4. P2 Serial Channel 0 P2 Connector 1 2 6 3 7 4 8 5 9 Pin Nos.
HARDWARE OVERVIEW To Host PC Shield Ground 1 14 TXD 2 15 RXD 3 16 RTS 3 4 17 To Evaluation Board 1 6 2 7 3 8 4 9 5 CTS 5 18 DCD DSR RXD RTS TXD CTS DTR RI GND DSR 6 19 GND 7 DTR 20 DCD 8 21 9 RI 22 10 P1 23 11 24 12 25 13 Note: Signal mnemonics are referenced to the host. A2343-02 Figure 3-5.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 3.7 EXPANSION INTERFACE There are two expansion connectors on the evaluation board. Refer to the schematics included on a floppy diskette in your kit for representation of the connector pinouts. The 60-pin JP1 connector (Figure 3-7) provides latched address pins and the address/data bus signals. This connector also provides access to all bus-control signals, programmable chip-selects, +3.3 volts, +5 volts, and +12 volts.
HARDWARE OVERVIEW VCC............ 1 2 - VCC T1OUT....... 3 4 - T0IN T0OUT....... 5 6 - T1IN VSS............. 7 8 - VSS P2.2............ 9 10 - INT0 P2.3............ 11 12 - INT1 BCLK0........ 13 14 - INT2 P2.6............ 15 16 - INT3 P2.7............ 17 18 - INT4 VSS............. 19 20 - VSS +5V............. 21 22 - GCS6# +12V........... 23 24 - GCS7# 3 Figure 3-7.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL JP1 Memory - I/O Expansion Connector 2x30 Pin Molex* 39-51-6004 or Equivalent LA0 Output.................. 3 2 - VCC 4 - D0 Bidirectional LA1 Output.................. 5 6 - D1 Bidirectional LA2 Output.................. 7 8 - D2 Bidirectional LA3 Output.................. 9 10 - D3 Bidirectional LA4 Output.................. 11 12 - D4 Bidirectional LA5 Output.................. 13 14 - D5 Bidirectional LA6 Output..................
HARDWARE OVERVIEW 3.8 LCD INTERFACE The evaluation board includes a 16-character by 1-line LCD display. The display has an 8-bit interface and is designed to operate at up to 20 MHz. The display includes a Hitachi* 44780 LCD display controller that takes care of functions such as character interpretation and display refresh. The display is write-only. This is because the display controller operates at 5 volts VCC. A 5-volt part driving a 3.3-volt bus can damage parts operating at 3.3 volts VCC.
4 Introduction to the Software
CHAPTER 4 INTRODUCTION TO THE SOFTWARE The Intel 186 EC/EB Evaluation Board uses an Embedded Controller Monitor (ECM) written for the 80x186 family of 16-bit microprocessors. This monitor supports basic debug facilities (LOAD, GO, STEP, etc.) in the user’s target system. The ECM is broken into two independent programs. One of these (iRISM-186) executes in the evaluation board and the other (iECM-86) executes in an IBM PC or BIOS-compatible computer.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 4.2 RESTRICTIONS Two words of the user stack are reserved for use by the iRISM-186 software. Other memory and/or registers in the target memory are used by the iRISM-186 software. The exact amount and location of this memory is implementation-dependent. An asynchronous serial port capable of operation at 9600 baud must be available in the target system. The RISM described in this document uses the 80x186 EB/EC internal serial port.
INTRODUCTION TO THE SOFTWARE 4.4 USER INTERFACE The user interface to the iECM-86 supports commands to initiate and configure the ECM-86, perform I/O operations involving DOS files, execute user programs, and interrogate variables in the target system. Interrogation can be done in a number of formats and in most cases can be done concurrently with user code execution. 4.4.1 Numeric Input The command parser used by the iECM-86 software requires that numeric inputs always start with the digits 0-9.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 4.5.2 -COM2, -COM1 These options tell the iECM-86 software which serial communication port is to be used. If neither option is entered, COM1 is used as a default. If iECM-86 detects valid CTS (Clear to Send) and DSR (Data Set Ready) signals from the appropriate COM port, it signs on and displays a command prompt. When the target is stopped, the command prompt is an asterisk (*). When the target is already running, the prompt is a greater-than sign (>). 4.5.
INTRODUCTION TO THE SOFTWARE 4.5.4 -POLL, -SIGNAL These two options control how the host software detects whether or not the user’s code is running. If poll mode is selected, the host periodically polls the target with a REPORT_STATUS command. This takes no additional hardware, but it forces the target to spend instruction cycles responding to the poll. The signal mode avoids this overhead, but it requires that the target set the Ring Indicator modem line before it issues a REPORT_STATUS command.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 4.6 RELATED INFORMATION All unreserved functions of the processor are available to you, except the Non-Maskable Interrupt (NMI), the Breakpoint instruction (INT 3), the Trap Flag (TF), 16 Kbytes of address space, and 128 bytes of I/O space. 4.6.1 Reserved Functions The Trap Flag and its vector in memory locations 4H–7H are reserved for use by the SSTEP command and BREAKPOINTS.
5 iECM-86 Commands
CHAPTER 5 iECM-86 COMMANDS This chapter defines the iECM-86 software commands. 5.1 ENTERING COMMANDS The syntax for iECM commands is shown below: COMMAND metasymbol iECM-86 command definitions use one or more of the following metasymbols: addr address segment:offset 5 iECM-86 is able to interpret the microprocessor’s address space as either a flat 20-bit array or through segmentation.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL bp_number Sixteen breakpoints are available to the user. This number selects which breakpoint to access. code_addr The code address may be specified by either segment: offset, CS:offset, or CB:offset. count This denotes the number of times a command executes. filename This is the location (path) and name of the file you want to reference (e.g., \progdir\program.obj). value Data to be entered in the current base notation. 5.
iECM-86 COMMANDS 5.2.2 Other File Operations In addition to object files, the iECM-86 makes use of include files, log files, and list files. Include files contain commands to be executed by iECM-86. They must contain the exact sequence of ASCII characters that you would enter from the keyboard to execute the command. Include files can be tedious to create with a text editor, so iECM-86 can generate log files that store characters entered by the user.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL parsing commands until a space character is entered from the keyboard (the space character can’t come from an INCLUDE file). This allows the user to pause in the middle of an INCLUDE file operation to see what is occurring and then acknowledge the pause condition by pressing the space bar. LIST This command behaves like the LIST filename command described below, except that it uses the last file name that was entered as part of a LIST filename command.
iECM-86 COMMANDS 5.3 PROGRAM CONTROL Commands that control program execution allow you to reset the processor, set execution breakpoints, start execution, stop execution, step, and super step. The commands are grouped by their major functions for the sake of discussion. 5.3.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL NOTE Most monitor programs similar to iECM-86 display a message on the console when a break occurs (e.g., “Program break at 1234H”). This is not done in iECM-86 because the system supports concurrent interrogation of the target on which the user's code is running; it is possible that the break will occur while you are in the middle of displaying or modifying the state of the target.
iECM-86 COMMANDS 5.3.3 Program Execution These commands start and stop execution of user code. The commands provided are: GO GO FOREVER GO FROM code_addr GO FROM code_addr FOREVER GO FROM code_addr TILL code_addr GO FROM code_addr TILL code_addr OR code_addr GO TILL code_addr GO TILL code_addr OR code_addr 5 HALT If a GO with breakpoint command is entered, the user code bytes at the breakpoints are saved and INT3s are substituted.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL GO FROM code_addr FOREVER This command loads the user’s PC with code_addr, clears the breakpoint array, and starts execution of the user’s code. GO FROM code_addr TILL code_addr This command loads the user’s PC with the code_addr that follows the FROM keyword, sets the first breakpoint (BR[0]) to the code_addr that follows the TILL keyword, and starts execution of the user’s code.
iECM-86 COMMANDS Super-stepping is similar to stepping, except that the super-step command treats an interrupt service routine or a subroutine call (and the body of the subroutine that is called) as one indivisible instruction. This allows the user to ignore the details of subroutines and interrupt service routines while evaluating code. This may allow limited stepping through code while operating in a concurrent environment, but the system will not operate in real time.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL {STEP | SSTEP} FROM code_addr count This command loads the user’s program counter (PC) with code_addr and then single-steps count times. 5.4 DISPLAYING AND MODIFYING PROGRAM VARIABLES iECM-86 provides commands to display and modify program variables in several formats. In addition to simple variables such as bytes and words, more complicated variables such as reals and character strings are supported.
iECM-86 COMMANDS 5.4.2 BYTE Commands There are four forms for the BYTE commands: BYTE byte_address BYTE byte_address = byte_value BYTE byte_address TO byte_address BYTE byte_address TO byte_address = byte_value All of these commands can be used whether or not the user’s program is running. BYTE byte_address This form is used to examine and then possibly change one or more sequential BYTE variables.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL BYTE byte_address TO byte_address = byte_value This form is used to initialize a region of memory to the given byte_value. Note that this command takes a little over a millisecond (at 9600 baud) for each BYTE loaded. You can terminate this command by entering a carriage return, but terminating the command leaves only part of the memory region initialized. 5.4.
iECM-86 COMMANDS command terminates when all of the WORD variables in the selected range have been displayed. During lengthy displays, you can stop the output to the console by pressing the space bar. You can resume the display by pressing the space bar a second time. You terminate the command by entering a carriage return. WORD word_address TO word_address = word_value This form is used to initialize a region of memory to the given word_value.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL DWORD variables. When this command is invoked, iECM-86 starts by displaying the current default base and then a series of lines showing the contents of the selected memory region. The next line starts with a hexadecimal display of the address of the next DWORD variable to be displayed followed by the display of up to 16 bytes of memory as DWORD variables in the default base. A new line starts whenever 16 bytes of memory have been displayed on the line.
iECM-86 COMMANDS resume the display by pressing the space bar a second time. You terminate the command by entering a carriage return. 5.4.6 STRING Commands There is only one form of the STRING command: STRING byte_address The line starts with a hexadecimal display of byte_address followed by the NUL-terminated ASCII string starting at that address. For long strings, only the first 60 characters are displayed. When trailing characters are stripped, decimal points (.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL default base and then a series of lines showing the contents of the selected ports. The next line starts with a hexadecimal display of the address of the next PORT variable to be displayed, followed by the display of up to 16 PORT variables in the default base. A new line starts whenever 16 ports have been displayed on the line. The command terminates when all of the PORT variables in the selected range have been displayed.
iECM-86 COMMANDS WPORT wport_address = word_value This form is used to set an individual WPORT variable without first checking its current value. When invoked, this command sets the WPORT variable at wport_address to word_value. WPORT wport_address TO wport_address This form is used to display a series of WPORT variables. When this command is invoked, iECM-86 starts by displaying the current default base and then a series of lines showing the contents of the selected ports.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL CS DS SP BP DI ES FLAGS IP PC {=} REGS SI SP = SS The processor variables can be modified only while the target is stopped. They can be read at any time. These commands allow the display and loading of the internal target processor registers. Display is in the default base. Addresses are displayed in the last format used (i.e., if PC was loaded with the PC=segment:offset command, addresses will be displayed in that format).
6 iRISM-186 Commands
CHAPTER 6 iRISM-186 COMMANDS This chapter describes the elements of iRISM-186 monitor code. This information is common to all implementations. 6.1 iRISM VARIABLES The following table lists the RISM variables and provides a description of each. Table 6-1. iRISM Variables Variable Description RISM_DATA A 32-bit register that acts as the primary data interface between software running in the host and the RISM running in the target.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 6.2 RISM STRUCTURE The RISM resides in the target system and provides the interface between the target system and the user interface, which resides in the host system. The RISM is compact and simple. This serves two purposes: 1. The RISM can reside in a user’s system with minimal impact on available memory. 2. The RISM is easy to port into the target’s environment. The internal state structure of the RISM was kept as simple as possible.
iRISM-186 COMMANDS 6.5.1 SET_DATA_FLAG (Code 00H) This command sets the DATA_FLAG. This forces the next character received by the RISM to be treated as data, even if its value corresponds to a RISM command. The code that overrides the normal selection of command or data also clears the DATA_FLAG so that it applies only to the first character received after the SET_DATA_FLAG command. 6.5.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 6.5.8 WRITE_DOUBLE (Code 09H) This command stores the RISM_DATA register in the double-word of memory pointed to by the RISM_ADDR register and increments the RISM_ADDR register (by four) to point at the next memory double-word. 6.5.9 LOAD_ADDRESS (Code 0AH) This command loads the RISM_ADDR register with the least-significant word in the RISM_DATA register. 6.5.
6.5.14 TRAP_ISR This is a pseudo-command. It cannot be issued directly by the host software, but is executed when an INT3 is executed. The INT3 instruction is used by iECM-86 for implementing software breakpoints and for single-stepping. A separate entry point into the STOP_USER command is provided for the INT3 vector. Code at this entry point sets the TRAP_FLAG and then drops into the code that implements the STOP_USER command. 6.5.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL 6.5.20 WRITE_WPORT (Code 19H) This command stores the least-significant word of the RISM_DATA register in the 16-bit output port pointed to by the RISM_ADDR register. 6.5.21 STEP (Code 1AH) This command sets the target processor’s TRAP_FLAG and the RUN_FLAG and steps one instruction. After setting these flags, the action of this command is similar to the START_USER command followed by a TRAP. 6.5.
iRISM-186 COMMANDS 6.5.24 Start Up Commands (/ or \) Upon reset, the board is in the echo mode. Until it receives an ASCII slash (/) or reverseslash (\), it increments every character it receives from the host and sends the incremented value back to the host. It also displays the binary code of the character received on the LEDs. If a reverse-slash is received by the RISM, the board leaves the echo mode and starts normal operation.
A Parts List
APPENDIX A PARTS LIST Table A-1 provides the board location, manufacturer, and description of each part on the 80186 EB Evaluation Board. Table A-2 provides the same information for the 186 EC Evaluation Board. Table A-1. 80186 EB Board Manual Parts List (Sheet 1 of 3) LOCATION MANUFACTURER PART NUMBER DESCRIPTION FOOTPRINT COMMENTS C31 Kemet # C0805C102K5RAC CAP, .001µF CC0805 SMT Chip Cap C22,C26 Kemet # C0805C103K5RAC CAP, .
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL Table A-1.
PARTS LIST Table A-1.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL Table A-2. 80186 EC Board Manual Parts List (Sheet 1 of 3) LOCATION MANUFACTURER PART NUMBER DESCRIPTION FOOTPRINT COMMENTS C31 Kemet # C0805C102K5RAC CAP, .001µF CC0805 SMT Chip Cap C21,C30 Kemet # C0805C103K5RAC CAP, .01µF CC0805 SMT Chip Cap C8,C32 Kemet # T491C106K010AS CAP, 10µF 6032 C7,C13,C14, Kemet # C0805C104K5RAC CAP, .
PARTS LIST Table A-2.
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL Table A-2. 80186 EC Board Manual Parts List (Sheet 3 of 3) LOCATION MANUFACTURER PART NUMBER DESCRIPTION FOOTPRINT 28 Pin PLCC socket SOCKET28 COMMENTS XU10 AMP # 822039-3 U10 Lattice # GAL22LV10C15LJ Low voltage GAL U1 Motorola # MC74AC14D 74AC14 SO14 U2 Maxim # MAX561CWI 562 Ser. xceiver SO28W SMT 3.
INDEX 80C186EB/EC features, 3-2 80C188EB/EC, configuring board jumpers, 3-2 8-bit bus, configuring the board for, 3-2 A adaptor 25-pin to 9-pin, 3-11 for in-circuit emulation, 3-2 B BCLK0 input, 3-10 breakpoints, 5-5 bus expansion, 3-14 C connectors P1, 3-9 P2, 3-10 customer service, 1-4 D data types, supported by iECM-86, 5-10 display controller, 3-15 E E1 jumper, 3-8 EIA/TIA-562 protocol, 3-10 Embedded Controller Monitor (ECM), 4-1, 4-2 evaluation board layout of EB, 2-1 layout of EC, 2-2 setting up
INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL L Maxim MAX561, 3-10 Maxim MAX750, 3-8 memory configuration, 3-3 memory map, 3-3 memory, reserved, 4-6 STOP_USER, 6-4 TRANSMIT, 6-3 TRAP_ISR, 6-5 WRITE_BPORT, 6-5 WRITE_BYTE, 6-3 WRITE_DOUBLE, 6-4 WRITE_PC, 6-4 WRITE_REG, 6-6 WRITE_WORD, 6-3 WRITE_WPORT, 6-6 RISM monitor, 3-3 N S non-maskable interrupt, 4-6 notational conventions, 1-2 segment variable registers, 5-1 serial control unit, 3-1 serial port connector (P1), 3-9 serial ports on-chip, 3-10 recon
