16-Bit High-Integration Embedded Processors Specification Sheet
80C186EA/80C188EA, 80L186EA/80L188EA
INSTRUCTION SET SUMMARY (Continued)
Function Format
80C186EA 80C188EA
Comments
Clock Clock
Cycles Cycles
DATA TRANSFER (Continued)
SEGMENT
e
Segment Override:
CS 00101110 2 2
SS 00110110 2 2
DS 00111110 2 2
ES 00100110 2 2
ARITHMETIC
ADD
e
Add:
Reg/memory with register to either 000000dw modreg r/m 3/10 3/10
*
Immediate to register/memory 100000sw mod000 r/m data data if s w
e
01 4/16 4/16
*
Immediate to accumulator 0000010w data data if w
e
1 3/4 3/4 8/16-bit
ADC
e
Add with carry:
Reg/memory with register to either 000100dw modreg r/m 3/10 3/10
*
Immediate to register/memory 100000sw mod010 r/m data data if s w
e
01 4/16 4/16
*
Immediate to accumulator 0001010w data data if w
e
1 3/4 3/4 8/16-bit
INC
e
Increment:
Register/memory 1111111w mod000 r/m 3/15 3/15
*
Register 01000 reg 3 3
SUB
e
Subtract:
Reg/memory and register to either 001010dw modreg r/m 3/10 3/10
*
Immediate from register/memory 100000sw mod101 r/m data data if s w
e
01 4/16 4/16
*
Immediate from accumulator 0010110w data data if w
e
1 3/4 3/4 8/16-bit
SBB
e
Subtract with borrow:
Reg/memory and register to either 000110dw modreg r/m 3/10 3/10
*
Immediate from register/memory 100000sw mod011 r/m data data if s w
e
01 4/16 4/16
*
Immediate from accumulator 0001110w data data if w
e
1 3/4 3/4
*
8/16-bit
DEC
e
Decrement
Register/memory 1111111w mod001 r/m 3/15 3/15
*
Register 01001 reg 3 3
CMP
e
Compare:
Register/memory with register 0011101w modreg r/m 3/10 3/10
*
Register with register/memory 0011100w modreg r/m 3/10 3/10
*
Immediate with register/memory 100000sw mod111 r/m data data if s w
e
01 3/10 3/10
*
Immediate with accumulator 0011110w data data if w
e
1 3/4 3/4 8/16-bit
NEG
e
Change sign register/memory 1111011w mod011 r/m 3/10
*
3/10
*
AAA
e
ASCII adjust for add 00110111 8 8
DAA
e
Decimal adjust for add 00100111 4 4
AAS
e
ASCII adjust for subtract 00111111 7 7
DAS
e
Decimal adjust for subtract 00101111 4 4
MUL
e
Multiply (unsigned): 1111011w mod100 r/m
Register-Byte 26–28 26–28
Register-Word 35–37 35–37
Memory-Byte 32–34 32–34
Memory-Word 41–43 41–48
*
Shaded areas indicate instructions not available in 8086/8088 microsystems.
NOTE:
*Clock cycles shown for byte transfers. For word operations, add 4 clock cycles for all memory transfers.
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