16-Bit High-Integration Embedded Processors Specification Sheet

80C186EA/80C188EA, 80L186EA/80L188EA
INSTRUCTION SET SUMMARY
Function Format
80C186EA 80C188EA
Comments
Clock Clock
Cycles Cycles
DATA TRANSFER
MOV
e
Move:
Register to Register/Memory 1000100w modreg r/m 2/12 2/12*
Register/memory to register 1000101w modreg r/m 2/9 2/9
Immediate to register/memory 1100011w mod000 r/m data data if w
e
1 12–13 12 –13 8/16-bit
Immediate to register 1011w reg data data if w
e
1 3– 4 3–4 8/16-bit
Memory to accumulator 1010000w addr-low addr-high 8 8*
Accumulator to memory 1010001w addr-low addr-high 9 9*
Register/memory to segment register 10001110 mod0reg r/m 2/9 2/13
Segment register to register/memory 10001100 mod0reg r/m 2/11 2/15
PUSH
e
Push:
Memory 11111111 mod110 r/m 16 20
Register 01010 reg 10 14
Segment register 000reg110 9 13
Immediate 011010s0 data data if s
e
01014
PUSHA
e
Push All 01100000 36 68
POP
e
Pop:
Memory 10001111 mod000 r/m 20 24
Register 01011 reg 10 14
Segment register 000reg111 (reg
i
01) 8 12
POPA
e
PopAll 01100001 51 83
XCHG
e
Exchange:
Register/memory with register 1000011w modreg r/m 4/17 4/17*
Register with accumulator 10010 reg 3 3
IN
e
Input from:
Fixed port 1110010w port 10 10*
Variable port 1110110w 8 7*
OUT
e
Output to:
Fixed port 1110011w port 9 9*
Variable port 1110111w 7 7*
XLAT
e
Translate byte to AL 11010111 11 15
LEA
e
Load EA to register 10001101 modreg r/m 6 6
LDS
e
Load pointer to DS 11000101 modreg r/m (mod
i
11) 18 26
LES
e
Load pointer to ES 11000100 modreg r/m (mod
i
11) 18 26
LAHF
e
Load AH with flags 10011111 2 2
SAHF
e
Store AH into flags 10011110 3 3
PUSHF
e
Push flags 10011100 9 13
POPF
e
Pop flags 10011101 8 12
Shaded areas indicate instructions not available in 8086/8088 microsystems.
NOTE:
*Clock cycles shown for byte transfers. For word operations, add 4 clock cycles for all memory transfers.
44
44