Datasheet
Datasheet 51
Thermal Specifications and Design Considerations
NOTES:
1. These values are specified at nominal V
CC
CORE
for the processor core and nominal VCC
L2
/VCC
3.3
for the L2
cache (if applicable).
2. Thermal Design Power (TDP) represents the maximum amount of power the thermal solution is required to
dissipate. The thermal solution should be designed to dissipate the TDP without exceeding the maximum
T
JUNCTION
specification. TDP does not represent the power delivery and voltage regulation requirements for
the processor.
3. T
JUNCTIONOFFSET
is the worst-case difference between the thermal reading from the on-die thermal diode
and the hottest location on the processor’s core.
4. Power density is the maximum power the processor die can dissipate (i.e., processor power) divided by the
die area over which the power is generated.
5. Power for these processors is generated over the entire processor die (see Figure 41 for processor die
dimensions).
6. Power for these processors is generated over the core area (see Figure 20 for processor die and core area
dimensions). Thermal solution designs should compensate for this smaller heat flux area (core) and not
assume that the power is uniformly distributed across the entire die area (core + cache).
7. T
JUNCTION
offset values do not include any thermal diode kit measurement error. Diode kit measurement
error must be added to the T
JUNCTION
offset value from the table, as outlined in the Intel
®
Pentium
®
III
processor Thermal Metrology for CPUID-068h Family Processors. Intel has characterized the use of the
Analog Devices AD1021 diode measurement kit and found its measurement error to be 1 °C.
8. This specification applies to the Pentium III processor with CPUID=0683h operating at 1.0 GHz.
9. These values are estimates based on preliminary simulation.
Table 26. Thermal Specifications for S.E.C.C.2 Packaged Processors
1
Proc.
Core Freq.
(MHz)
L2 Cache
Size
(Kbytes)
Thermal
Design
Power
2
(W)
L2 Cache
Power (W)
Power Density
4
(W/cm
2
)
Up to
CPUID 0683h
Power
Density
4
(W/cm
2
) For
CPUID 0686h
6
Max
T
JUNCTION
(°C)
T
JUNCTION
Offset
3
(°C)
L2 Cache
Min T
CASE
(°C)
L2 Cache
Max T
CASE
(°C)
Min
T
COVER
(°C)
Max
T
COVER
(°C)
450 512 25.3 1.26 21.6
5
n/a 90 4.8 5 105 5 75
500 512 28.0 1.33 23.9
5
n/a 90 4.8 5 105 5 75
533B 512 29.7 1.37 25.4
5
n/a 90 4.8 5 105 5 75
533EB 256 14.0 N/A 19.3
6
22.0 82 2.0
7
N/A N/A 5 75
550 512 30.8 1.37 26.3
5
n/a 80 4.8 5 105 5 75
550E 256 14.5 N/A 20.0
6
22.8 82 2.1
7
N/A N/A 5 75
600 512 34.5 1.60 29.5
5
n/a 85 4.8 5 105 5 75
600B 512 34.5 1.60 29.5
5
n/a 85 4.8 5 105 5 75
600E 256 15.8 N/A 21.8
6
24.8 82 2.3
7
N/A N/A 5 75
600EB 256 15.8 N/A 21.8
6
24.8 82 2.3
7
N/A N/A 5 75
650 256 17.0 N/A 23.4
6
26.7 82 2.5
7
N/A N/A 5 75
667 256 17.5 N/A 24.1
6
27.5 82 2.5
7
N/A N/A 5 75
700 256 18.3 N/A 25.2
6
28.7 80 2.7
7
N/A N/A 5 75
733 256 19.1 N/A 26.3
6
30.0 80 2.8
7
N/A N/A 5 75
750 256 19.5 N/A 26.9
6
30.6 80 2.8
7
N/A N/A 5 75
800 256 20.8 N/A 28.7
6
32.6 80 3.0
7
N/A N/A 5 75
800EB 256 20.8 N/A 28.7
6
32.6 80 3.0
7
N/A N/A 5 75
850 256 22.5 N/A 31.0
6
35.2 80 3.3
7
N/A N/A 5 75
866 256 22.9 N/A 31.5
6
35.9 80 3.3
7
N/A N/A 5 75
933 256 25.5 N/A 35.1
6
39.9 75 3.7 N/A N/A 5 75
1.0 GHz
8
256 33 N/A 45.5
6
n/a 60 4.7
7,8
N/A N/A 5 75
1.0 GHz 256 26.1 N/A 35.9
6
40.9 70 3.8
7
N/A N/A 5 70
1.0B GHz 256 26.1 N/A 35.9
6
40.9 70 3.8
7
N/A N/A 5 70