Datasheet
Pentium
®
III Xeon™ Processor at 500 and 550 MHz
82
Datasheet
NOTES:
1. Resistor values with “~” preceding them can vary from the specified value; use resistor as close as possible
to the value specified.
2. Termination for these signals should include series (~240
Ω
) and GTL+ termination (conne cted to 1.5V)
resistors. See Figure 41.
3. Signal should be at end of daisy chain and the boundary scan chain should be partitioned into two distinct
sections to assist in debugging the system: one partition with only the processor(s) for system debug (i.e.,
used with an ITP) and another with all other components for manufacturing or system test.
8.1.4 Debug Port Signal Notes
In general, all open drain AGTL+ outputs from the system must be retained at a proper logic level,
whether or not the debug port is installed. RESET# from the processor system should be terminated
at the debug port, as shown in Figure 41. R
t
should be a 150
Ω
on RESET#.
PRDYn# should have a similar layout, however R
t
should be 50
Ω
to match board impedance rather
than the normal 150
Ω
since there are only 2 loads on this signal.
PRDY3# 30 PRDY3# signal fro
ITP to P3.
Te r m i n a t e
2
signal properly
at the debug port
Debug port must be at the
end of the signal trace
Connected to high speed
comparator (biased at 2/3 of
the level found at the
POWERON pin) on an ITP
buffer board. Additional load
does not change timing
calculations for the processor
bus agents if routed properly.
BCLK 29 Bus clock from the
MP cluster.
Use a separate driver to
drive signal to the debug
port.
Must be connected to
support future steppings of
the Pentium III Xeon
processors.
A separate driver should be
used to avoid loading issues
associated with having an ITP
either installed or not
installed.
GND 2, 4, 6,
13, 15,
17, 19,
21, 23,
25, 27
Signal ground. Connect all pins to signal
ground
Table 44. Debug Port Pinout Description and Requirements
1
(Sheet 3 of 3)
Name Pin Description
Specification
Requirement
Notes
Figure 41. AGTL+ Signal Termination
Debug
Port
Load Load
R
t
R = 240
Ω
s
1.5V
RESET#
Sourc
R
s
Short Trac