Datasheet

Pentium
®
III Xeon™ Processor at 500 and 550 MHz
68
Datasheet
A83 RESERVED_A83 DO NOT CONNECT
B163 RESERVED_B163 DO NOT CONNECT
B22 RESERVED_B22 DO NOT CONNECT
B24 RESERVED_B24 DO NOT CONNECT
B25 RESERVED_B25 DO NOT CONNECT
B3 RESERVED_B3 DO NOT CONNECT
B34 RESERVED_B34 DO NOT CONNECT
B83 RESERVED_B83 DO NOT CONNECT
B84 RESERVED_B84 DO NOT CONNECT
B9 RESERVED_B9 DO NOT CONNECT
B98 RESET# AGTL+ Input
B140 RP# AGTL+ I/O
B136 RS#[0] AGTL+ Input
A139 RS#[1] AGTL+ Input
B139 RS#[2] AGTL+ Input
B145 RSP# AGTL+ Input
A163 SA0 SMBus Input
A162 SA1 SMBus Input
A159 SA2 SMBus Input
A9 SELFSB0 CMOS I/O
A7 SELFSB1 CMOS I/O
B18 SLP# CMOS Input
A151 SMBALERT# SMBus Aler
B160 SMBCLK SMBus Clock
B161 SMBDA SMBus I/O
B12 SMI# CMOS Input
B15 STPCLK# CMOS Input
B16 TCK TAP Clock
A18 TDI TAP Input
A20 TDO TAP Output
A62 TEST_25_A62 Pull up to 2. 5V
A23 TEST_VCC_CORE_A23 Pull up to VCC_CORE
B27 TEST_VCC_CORE_B27 Pull up to VCC_CORE
A11 TEST_VSS_A11
Pull down to
V
SS
A98 TEST_VSS_A98
Pull down to
V
SS
B4 TEST_VSS_B4
Pull down to
V
SS
A82 TEST_VTT_A82 Pull up to V
TT
A24 THERMTRIP# CMOS Output
B19 TMS TAP Input
A130 TRDY# AGTL+ Input
Table 41. Signal Listing in Order by Pin
Name (Sheet 5 of 9)
Pin No. Pin Name Signal Buffer Type
B21 TRST# TAP Input
B100 VCC_CORE CPU Core V
CC
B103 VCC_CORE CPU Core V
CC
B11 VCC_CORE CPU Core V
CC
B14 VCC_CORE CPU Core V
CC
B17 VCC_CORE CPU Core V
CC
B2 VCC_CORE CPU Core V
CC
B20 VCC_CORE CPU Core V
CC
B23 VCC_CORE CPU Core V
CC
B26 VCC_CORE CPU Core V
CC
B29 VCC_CORE CPU Core V
CC
B32 VCC_CORE CPU Core V
CC
B35 VCC_CORE CPU Core V
CC
B38 VCC_CORE CPU Core V
CC
B41 VCC_CORE CPU Core V
CC
B44 VCC_CORE CPU Core V
CC
B47 VCC_CORE CPU Core V
CC
B5 VCC_CORE CPU Core V
CC
B50 VCC_CORE CPU Core V
CC
B53 VCC_CORE CPU Core V
CC
B56 VCC_CORE CPU Core V
CC
B58 VCC_CORE CPU Core V
CC
B61 VCC_CORE CPU Core V
CC
B64 VCC_CORE CPU Core V
CC
B67 VCC_CORE CPU Core V
CC
B70 VCC_CORE CPU Core V
CC
B73 VCC_CORE CPU Core V
CC
B76 VCC_CORE CPU Core V
CC
B79 VCC_CORE CPU Core V
CC
B8 VCC_CORE CPU Core V
CC
B82 VCC_CORE CPU Core V
CC
B85 VCC_CORE CPU Core V
CC
B88 VCC_CORE CPU Core V
CC
B91 VCC_CORE CPU Core V
CC
B94 VCC_CORE CPU Core V
CC
B97 VCC_CORE CPU Core V
CC
B106 VCC_L2 L2 Cache V
CC
B109 VCC_L2 L2 Cache V
CC
B112 VCC_L2 L2 Cache V
CC
B115 VCC_L2 L2 Cache V
CC
Table 41. Signal Listing in Order by Pin
Name (Sheet 6 of 9)
Pin No. Pin Name Signal Buffer Typ