Datasheet

Pentium

III Xeon™ Processor at 500 and 550 MHz

Datasheet

All of the commands are for reading or writing registers in the thermal sensor except the one-shot

command (OSHT). The one-shot command forces the immediate start of a new conversion cycle. If

a conversion is in progress when the one-shot command is received, then the command is ignored.

If the thermal sensor is in standby mode when the one-shot command is received, a conversion is

performed and the sensor returns to standby mode. The one-shot command is not supported when

the thermal sensor is in auto-convert mode.

The default command after reset is to a reserved value (00h). After reset, receive byte packets will

return invalid data until another command is sent to the thermal sensor.

4.3.6 Thermal Sensor Register

4.3.6.1 Thermal Reference Registers

The processor core and thermal sensor internal thermal reference registers contain the thermal

reference value of the thermal sensor and the processor core thermal diodes. This value ranges from

+127 to -128 decimal and is expressed as a two’s complement, eight-bit number. These registers are

saturating, i.e., values above 127 are represented at 127 decimal, and values below -128 are

represented as -128 decimal.

4.3.6.2 Thermal Limit Registers

The thermal sensor has two thermal limit registers; they define high and low limits for the

processor core thermal diode. The encoding for these registers is the same as for the thermal

reference registers. If the diode thermal value equals or exceeds one of its limits, then its alarm bit

in the Status Register is triggered.

4.3.6.3 Status Register

The status register shown in Table 33 indicates which (if any) thermal value thresholds have been

exceeded. It also indicates if a conversion is in progress or if an open circuit has been detected in

the processor core thermal diode connection. Once set, alarm bits stay set until they are cleared by

a status register read. A successful read to the status register will clear any alarm bits that may have

been set, unless the alarm condition persists.

RESERVED 0Ch N/A Reserved for future use

WRHL 0Dh N/A Write processor core thermal diode T

HIGH

limit

WRLL 0Eh N/A Write processor core thermal diode T

LOW

lim

OSHT 0Fh N/A One shot command (use send byte packet)

RESERVED 10h – FFh N/A Reserved for future use

Table 32. Command Byte Bit Assignments (Sheet 2 of 2)