Datasheet

Pentium
®
III Xeon™ Processor at 500 and 550 MHz
42
Datasheet
4.3.2 Scratch EEPROM
Also available on the SMBus is an EEPROM which may be used for other data at the system or
processor vendor’s discretion. The data in this EEPROM, once programmed, can be write-
protected by asserting the active-high WP signal. This signal has a weak pull-down (10 k
) to
allow the EEPROM to be programmed in systems with no implementation of this signal. The
Scratch EEPROM is a 1024 bit part.
8
L2 Cache Voltage Tolerance,
High
Edge finger tolerance in mV, +
8 L2 Cache Voltage Tolerance, Low Edge finger tolerance in mV, -
4 Cache/Tag Stepping ID One 4-bit hex digit
4 Reserved Reserved for future use
8 Checksu 1 byte checksu
CARTRIDGE: 32h 32 Cartridge Revision Four 8-bit ASCII characters
2 Substrate Rev. Software ID 2-bit revision number
6 Reserved Reserved for future use
8 Checksu 1 byte checksu
PART NU M BER S :
38h
56 Processor Part Number Seven 8-bit ASCII characters
112 Processor BOM ID Fourteen 8-bit ASCII characters
64 Processor Electronic Signature 64-bit processor number
208 Reserved Reserved for future use
8 Checksu 1 byte checksu
THERMAL REF.:
70h
8 Thermal Reference Byte See below
16 Reserved Reserved for future use
8 Checksu 1 byte checksu
FEATURES: 74h 32 Processor Core Feature Flags From CPUID
32 Cartridge Feature Flags
[6] = Serial Signature
[5] = Electronic Signature Present
[4] = Thermal Sense Device Present
[3] = Thermal Reference Byte Present
[2] = OEM EEPROM Present
[1] = Core VID Present
[0] = L2 Cache VID Present
4 Number of Devices in TAP Chain One 4-bit hex digit
4 Reserved Reserved for future use
8 Checksu 1 byte checksu
OTHER: 7Eh 16 Reserved Reserved for future use
Table 23. Processor Information ROM Format (Sheet 2 of 2)
Offset/Section # of Bit Function Notes