Intel Pentium M Processor Specification Update

Errata
18 Specification Update
technology MOV instruction) and the load has an longer than typical latency the
processor can enter a livelock.
Implication: When this erratum occurs, the processor will enter a livelock condition. Intel has not
observed this erratum with any commercially available software or system.
Workaround: None.
Status: For the steppings affected, see the Summary of Tables of Changes
.
Y9. Write Cycle of Write Combining Memory Type Does Not Self Snoop
Problem: Write cycles of WC memory type do not self-snoop. This may result in data
inconsistency – if the addresses of the WC data are aliased to WB memory type
memory, which has been cached. In such a case, the internal caches will not be
updated with the WC data sent on the system bus.
Implication: This condition may result in a data inconsistency. Intel has not observed this erratum
with any commercially available software, system, nor components.
Workaround: Software should detect via the self-snoop bit in the CPUID features flags if the
processor supports a self-snooping capability. Software should perform explicit
memory management/flushing for aliased memory ranges on processors that do not
self-snoop.
Status: For the steppings affected, see the Summary of Tables of Changes
.
Y10. Performance Monitoring Event that Counts Floating Point
Computational Exceptions (11h) Is Not Accurate
Problem: Performance monitoring event that counts Floating Point Compare exceptions may
have inaccurate results.
Implication: There is no functional impact of this erratum. However this Performance Monitoring
Event should not be used when accurate performance monitoring is required.
Workaround: None.
Status: For the steppings affected, see the Summary of Tables of Changes
.
Y11. Inconsistent Reporting of Data Breakpoints on FP (MMX™
Technology) Loads
Problem: The reporting of data breakpoints on either FP or MMX technology loads is dependent
upon the code faulting behavior prior to the execution of the load. If there is a fault
pending prior to the execution of the load and FP exceptions are enabled there is a
chance that data breakpoint on successive FP/MMX technology Loads may be reported
twice.
Implication: Software debuggers should be aware of this possibility. There should be no
implications to software operated outside of a debug environment.
Workaround: None.
Status: For the steppings affected, see the Summary of Tables of Changes
.