Dadi Perlmutter Keynote

IDF 08-27-06 Afternoon session

Page 12

frequency mode is just what you need. And the lower the power

you get, the better it is.

So, in the Santa Rosa generation, we have this super LFM. We

now do the same trick that we do on the CPU core, taking it all

the way down from high frequency to low frequency, doing the

same with the bus, and taking that from 800 megahertz to 400

megahertz, resulting in the CPU frequency moving from 1,200

megahertz to 600 megahertz. This results in yet another

reduction in active power. This is critical when you really

measure, and will get battery life better.

The second one is when the chip is in stop mode. In core

architecture, which is shared with Core Duo and Core 2 Duo, we

have added the enhanced deeper sleep. In the enhanced

deeper sleep, what happens is that the CPU frees up and

evacuates all the contents from the cache and gets to then

lower level of voltage, which means low power, and leakage

goes exponentially with voltage. But each time there was a bus

activity generated by memory activity, the chip set was waking

up the CPU, checking on do you have this stuff in the cache.

And the answer was no, because it was not there. We added a

new capability. And with this new capability, the chip set knows

that the cache is empty, and therefore does not have to go wake

up the CPU and get it into an active mode, check the status of

the cache and go back. It really gets to the situation where the

CPU is in deeper sleep, as much as is needed, and is being