Intel Pentium M Processor Datasheet
22 Intel
®
Pentium
®
M Processor Datasheet
Electrical Specifications
3.9 Maximum Ratings
Table 4 lists the processor’s maximum environmental stress ratings. The processor should not
receive a clock while subjected to these conditions. Functional operating parameters are listed in
the DC tables. Extended exposure to the maximum ratings may affect device reliability.
Furthermore, although the processor includes protective circuitry to resist damage from Electro
Static Discharge (ESD), system designers must always take precautions to avoid high static
voltages or electric fields.
NOTES:
1. This rating applies to any processor pin.
2. Contact Intel for storage requirements in excess of one year.
3.10 Processor DC Specifications
The processor DC specifications in this section are defined at the processor core (pads) unless
noted otherwise. See Table 15 for the pin signal definitions and signal pin assignments. Most of
the signals on the processor system bus are in the AGTL+ signal group and the DC specifications
for these signals are also listed. DC specifications for the CMOS group are listed in Table 16.
Table 5 through Table 16 list the DC specifications for the Intel Pentium M processor and are valid
only while meeting specifications for junction temperature, clock frequency, and input voltages.
The Highest Frequency (HFM) and Lowest Frequency Modes (LFM) refer to the highest and
lowest core operating frequencies supported on the processor. Active Mode load line specifications
apply in all states except in the Deep Sleep and Deeper Sleep states. V
CC,BOOT
is the default
voltage driven by the voltage regulator at power up in order to set the VID values. Unless specified
otherwise, all specifications for the Intel Pentium M processor are at Tjunction = 100°C. Care
should be taken to read all notes associated with each parameter.
Table 4. Processor DC Absolute Maximum Ratings
Symbol Parameter Min Max Unit Notes
TSTORAGE
Processor storage
temperature
–40 85 °C 2
V
CC
Any processor supply
voltage with respect to V
SS
-0.3 1.75 V 1
V
inAGTL+
AGTL+ buffer DC input
voltage with respect to V
SS
-0.1 1.75 V 1, 2
V
inAsynch_CMOS
CMOS buffer DC input
voltage with respect to V
SS
-0.1 1.75 V 1, 2