Guide

System Memory Design Guidelines (DDR-SDRAM)
R
114 Intel
®
852GM Chipset Platform Design Guide
Figure 56. Topology 2 Command Signal to Clock Trace Length Matching Diagram
SO-DIMM0
GMCH Package
SMAA[12:6,3,0]
SBA[1:0],
SRAS#, SCAS#,
SWE#
SCK[2:0]
SCK#[2:0]
Note: All lengths are measured from MCH die pad to SO-DIMM connector pad.
Clock Reference Length = X0
SO-DIMM0
SO-DIMM1
SCK[5:3]
SCK#[5:3]
Clock Ref Length = X1
CMD Length = Y0
(X0 – 1.0") <= Y0 <= (X0 + 2.0")
CMD Length = Y1
(X1 –1.0") <= Y1 <= (X1 +2.0")
GMCH Package
Note: All lengths are measured from GMCH die pad to SO-DIMM connector pad.
SBA[1:0],
SRAS#, SCAS#,
SWE#
SMAA[12:6,3,0]
GMCH
Die
GMCH
Die