Intel Pentium M Processor Specification Update

Errata
16 Specification Update
Errata
Y1. Performance Monitoring Event That Counts Intel® Thermal Monitor 2
Transitions (59h) Is Not Accurate.
Problem: The performance monitoring event that counts Intel Thermal Monitor 2 (Enhanced
Intel SpeedStep
®
technology based) transitions may have inaccurate results.
Implication: There is no functional impact of this erratum. However this Performance Monitoring
Event should not be used when accurate performance monitoring is required.
Workaround: None.
Status: For the steppings affected, see the Summary Tables of Changes
.
Y2. Performance Monitoring Event that Counts the Number of
Instructions Decoded (D0h) Is Not Accurate
Problem: The performance-monitoring event that counts the number of instructions decoded
may have inaccurate results.
Implication: There is no functional impact of this erratum. However the results/counts from this
Performance Monitoring Event should not be considered as being accurate.
Workaround: None.
Status: For the steppings affected, see the Summary Tables of Changes
.
Y3. RDTSC Instruction May Report the Wrong Time-stamp Counter Value
Problem: The Time-stamp Counter is a 64-bit counter that is read in two 32-bit chunks. The
counter incorrectly advances and therefore the two chunks may go out of
synchronization causing the Read Time-stamp Counter (RDTSC) instruction to report
the wrong time-stamp counter value.
Implication: This erratum may cause software to see the wrong representation of processor time
and may result in unpredictable software operation.
Workaround: It is possible for BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes
.
Y4. Code Segment Limit Violation May Occur on 4 Gigabyte Limit Check
Problem: Code Segment limit violation may occur on 4 Gigabyte limit check when the code
stream wraps around in a way that one instruction ends at the last byte of the
segment and the next instruction begins at 0x0.