Intel Pentium M Processor on 90nm Process with 2-MB L2 Cache Specification Update

4 Specification Update
Revision History
Revision
Description
Date
-001
 Initial Release
May 2004
-002
 Updated Processor Identification Table
June 2004
-003
 Updated Processor Identification Table
 Added Erratum X10
July 2004
-004
 Added Erratum X11, X12 and X13
October 2004
-005
 Added Erratum X14, X15 and X16
November 2004
-006
 Added Erratum X17 and X18
December 2004
-007
 Updated Processor Identification Table: Added C-0 S-Specs
 Updated Summary Tables of Changes
 Added Erratum X19 – X21
February 2005
-008
 Updated Summary of Tables of Changes
 Updated Processor Identification Table
 Added Specification Clarification X1
April 2005
-009
 Updated Processor Identification Table: Shading corrected from
revision -008.
April 2005
-010
 Added Erratum X22
 Added Specification Clarification X2
May 2005
-011
 Updated Summary Tables of Changes
 Added Erratum X23, X24 and X25
June 2005
-012
 Updated Processor Identification Table 1
July 2005
-013
 Updated Affected and Related Documents Tables
 Updated Processor Identification Table 1
 Removed Erratum X13 (which was duplicate of X1)
July 2005
-014
 Added Specification Change X1
October 2005
-015
 Added Erratum X26
November 2005
-016
 Added Erratum X27 and X28
December 2005
-017
 Added Erratum X29 - X35
 Removed Specification Clarification X1; refer to Section 18.8 of the IA-
32 Intel® Architecture Software Developer’s Manual, Volume 3B for
detailed Time Stamp Counter information
January 2006