Specification Update

Summary Table of Changes
12 Intel
®
Xeon
®
Processor E7 v2 Product Family
Specification Update January 2015
CF117 XNo FixSpurious Patrol Scrub Errors Observed During a Warm Reset
CF118 XNo Fix
PCIe Slot Status Register Command Completed bit not always updated on
any configuration write to the Slot Control Register
CF119 XNo FixPlatform Recovery After a Machine Check May Fail
CF120 XNo FixPECI May be Non-responsive When System is in BMC Init Mode
CF121 XNo Fix
A CATERR# May Be Observed During Warm Reset when Intel SMI2 Clock
Stop is Enabled
CF122 XNo FixSurprise Down Error Status is Not Set Correctly on DMI Port
CF123 XNo FixProcessor May Issue Unexpected NAK DLLP Upon PCIe* L1 Exit
CF124 XNo Fix
A MOV to CR3 When EPT is Enabled May Lead to an Unexpected Page Fault or
an Incorrect Page Translation
CF125 XNo FixReading Intel® SMI2 Broadcast CSRs May Return Incorrect Data
CF126 XNo Fix
Intel QPI LLR.REQ Sent After a PHY Reset May Cause a UC Machine Check in
CRC16 Mode
CF127 XNo FixRTID_POOL_CONFIG Registers Incorrectly Behave as a Read-Write Registers
CF128 XNo FixCatastrophic Trip Triggered at Lower Than Expected Temperatures
CF129 XNo FixPCIe* Hot-Plug Slot Status Register May Not Indicate Command Completed
CF130 XNo Fix
PCIe* Correctable Error Status Register May Not Log Receiver Error at 8.0
GT/s
CF131 XNo Fix
Heavy Memory-to-Memory Traffic on DMA Channels During ROL Traffic May
Cause a Machine Check or Hang
CF132 XNo FixConfiguring PCIe* Port 3a as an NTB Disables EOI Forwarding to Port 2a
CF133 XNo FixPCIe* LBMS Bit Incorrectly Set
CF134 XNo FixPCIe* DLW is Not Supported When Operating at 8 GT/s
CF135 XNo FixMemory Online Request May be Lost When Package C-States Are Enabled
CF136 XNo Fix
Spurious Patrol Scrub Errors May Be Reported During Exit From Deep
Package C-States
CF137 XNo FixLocal PCIe* P2P Traffic on x4 Ports May Cause a System Hang
CF138 XNo Fix
NTB Operating In NTB/RP Mode May Complete Transactions With Incorrect
ReqID
CF139 XNo FixWarm Reset May Cause PCIe And Memory Hot-Plug Sequencing Failure
CF140 XNo Fix
Performance Monitoring IA32_PERF_GLOBAL_STATUS.CondChgd Bit Not
Cleared by Reset
CF141 XNo Fix
Intel ® QuickData Technology DMA Engine Read Request that Receives a
Master Abort or Completer Abort Will Hang
CF142 XNo Fix
PCIe* TLP Translation Request Errors Are Not Properly Logged For Invalid
Memory Writes
CF143 XNo FixThreshold-Based Status Indicator Not Updated After a UC or UCR Occurs
CF144 XNo Fix
PCIe* Slave Loopback May Transmit Incorrect Sync Headers
CF145 XNo FixPCIe* Type 1 VDMs May be Silently Dropped
CF146 XNo Fix
Writing PCIe* Port 2A DEVCTRL May Have Side Effects When Port 2 is
Bifurcated
CF147 XNo FixPerformance Monitor Instructions Retired Event May Not Count Consistently
CF148 XNo FixPatrol Scrubbing Doesn’t Skip Ranks Disabled After DDR Training
Table 1. Summary Table of Changes (Sheet 5 of 6)
No.
Stepping
Status Errata
D1