Hub Datasheet

Intel
®
E7505 Chipset MCH Datasheet 145
System Address Map
System Address Map 4
A system based on the E7505 chipset supports 16 GB–64 MB (see note) of host-addressable
memory space and 64 KB + 3 of host-addressable I/O space. The I/O and memory spaces are
divided by system configuration software into regions. The memory ranges are useful either as
system memory or as specialized memory, while the I/O regions are used to control the operation
of devices in the system.
Note: The maximum usable memory address decode is 15.94 GB (16 GB–64MB)
4.1 System Memory Spaces
There are four basic regions of memory in the system:
• High Memory Range. Memory above 4 GB. This memory range is for additional main
memory (1_0000_0000h to 3_FFFF_FFFFh).
• Memory between the TOLM Register and 4 GB. This range is used for mapping APIC and
Hub Interface_A–B. Programmable non-overlapping I/O windows can be mapped to this area.
• Memory between 1 MB and the Top of Low Memory (TOLM) Register. This is a main
memory address range (0_0100_0000h to TOLM).
• DOS Compatible memory area. Memory below 1 MB (0_0000_0000h to 0_0009_FFFFh).
The DRAM that physically overlaps the PCI Memory Address Range is recovered by the system.
For example, if there is 4 GB of physical DRAM and 1 GB of PCI space, then the system can
address a total of 5 GB. In this instance the top GB of physical DRAM is addressed between 4 GB
and 5 GB by the system.
Figure 4-1. System Memory Address Map
DOS Legacy Address
Range
Main Memory
Address Range
PCI Memory Address
Range
Top of Low
Memory
1 MB
4 GB
Hub Interface_A-B
I/O
Aperture
APICs
Independently Programmable
Non-overlapping Windows
Additional Main
Memory Address
Range
16 GB