Vol 1

Intel® Xeon® Processor E7-8800/4800/2800 v2 Product Family 7
Datasheet Volume One, February 2014
4-3 155W Thermal Profile Table................................................................................49
4-4 Tcase: 130W Thermal Specifications ....................................................................50
4-5 130W Thermal Profile Table................................................................................52
4-6 Tcase: 105W Thermal Specifications ....................................................................53
4-7 105W Thermal Profile Table................................................................................56
5-1 Memory Channel Signals ....................................................................................63
5-2 PCI Express* Port Signals...................................................................................63
5-3 DMI2 to Port 0 Signals.......................................................................................63
5-4 Intel QPI Port 0, 1 and 2 Signals .........................................................................64
5-5 PECI Signals.....................................................................................................64
5-6 System Reference Clock (BCLK{0/1}) Signals.......................................................64
5-7 JTAG and TAP Signals ........................................................................................64
5-8 SVID Signals ....................................................................................................65
5-9 PIROM Signals ..................................................................................................65
5-10 Processor Asynchronous Sideband Signals ............................................................66
5-11 Miscellaneous Signals ........................................................................................67
5-12 Power and Ground Signals..................................................................................68
6-1 Power and Ground Lands....................................................................................72
6-2 SVID Address Usage..........................................................................................75
6-3 VR12.0 Reference Code Voltage Identification (VID)...............................................76
6-4 Signal Description Buffer Types...........................................................................77
6-5 Signal Groups...................................................................................................77
6-6 Signals with On-Die Termination .........................................................................79
6-7 Power-On Configuration Option Lands ..................................................................80
6-8 Fault Resilient Booting (Output Tri-State) Signals ..................................................81
6-9 Processor Absolute Minimum and Maximum Ratings...............................................82
6-10 Storage Condition Ratings ..................................................................................83
6-11 Package C-State Power Specifications ..................................................................83
6-12 Voltage Specification..........................................................................................84
6-13 Current (ICC_MAX and ICC_TDC) Specification......................................................85
6-14 VCC Static and Transient Tolerance Intel® Xeon® E7 v2 Processor..........................86
6-15 VCC Overshoot Specifications..............................................................................88
6-16 PECI DC Specifications.......................................................................................89
6-17 System Reference Clock (BCLK{0/1}) DC Specifications .........................................90
6-18 SMBus DC Specifications ....................................................................................90
6-19 JTAG and TAP Signals DC Specifications ...............................................................90
6-20 Serial VID Interface (SVID) DC Specifications........................................................91
6-21 Processor Asynchronous Sideband DC Specifications ..............................................91
6-22 Miscellaneous Signals DC Specifications................................................................92
6-23 System Reference Clock (BCLK{0/1}) AC Specifications .........................................93
6-24 BCLK{0/1} Periods with Spread Spectrum Clocking (SSC) ......................................93
6-25 SMBus Signal AC Specifications...........................................................................94
6-26 JTAG and TAP Signal AC Specifications.................................................................94
6-27 Serial VID (SVID) Interface AC Timing Specifications..............................................95
6-28 Processor Asynchronous Sideband and Miscellaneous Signals AC Specifications..........95
6-29 Processor I/O Overshoot/Undershoot Specifications ............................................. 108
7-1 Land Name..................................................................................................... 109
7-2 Land Number.................................................................................................. 134
8-1 Processor Loading Specifications ....................................................................... 163
8-2 Package Handling Guidelines............................................................................. 163
8-3 Processor Materials.......................................................................................... 164
9-1 Read Byte SMBus Packet.................................................................................. 167