Hub Datasheet

Signal Description
34 Intel
®
E7505 Chipset MCH Datasheet
2.6.2 AGP Address / Data Signals
Table 2-7. AGP Address/ Data Signals
Signal Name Type Description
GDEVSEL# (2.0),
GDEVSEL (3.0)
I/O
s/t/s
AGP
Device Select: During GFRAME(#) based accesses, GDEVSEL(#) is driven
active by the target to indicate that it is responding to the access. Not used
during AGP transactions
GAD[31:0]
I/O
AGP
Address/Data: These signals provide the address for GFRAME(#) and
PIPE(#) transactions, and the data for all transactions. They operate at a 1x
data rate for GFRAME(#) based cycles other than Fast Write data phases, and
the address phase of PIPE(#) based cycles, and operate at the specified
channel rate
(1x, 2x, 4x, or 8x) for AGP data phases and fast write data phases.
GC/BE[3:0]# (2.0),
GC#/BE[3:0] (3.0)
I/O
AGP
Command/Byte Enables: These signals provide the command during the
address phase of a GFRAME(#) or PIPE(#) transaction, and byte enables
during data phases. Byte enables are not used for read data of AGP 1x and 2x
accesses, but are used for all write transactions, GFRAME(#) based reads,
and 4x and 8x reads. These signals operate at the same data rate as the
GAD[31:0] signals at any given time.
GPAR
I/O
AGP
Parity: This signal is Not used on AGP transactions but used during
GFRAME(#) based transactions as defined by the PCI specification. GPAR is
not used during fast writes.
DBI_LO
(3.0 only)
I/O
AGP
Dynamic Bus Inversion Lo: This signal is provided along with GAD[15:0] to
indicate whether GAD[15:0] must be inverted on the receiving end.
• DBI_LO = 0. GAD[15:0] is not inverted so receiver may use as is.
• DBI_LO = 1. GAD[15:0] is inverted so receiver must invert before use.
The AD_STBF1 and AD_STBS1 strobes are used with DBI_LO. DBI is used in
AGP 3.0 signaling mode only.
In AGP 3.0 signaling mode (4x data rate), DBI is disabled by the MCH while
transmitting (data never inverted and DBI_HI driven low) but is enabled when
receiving data. For 8x data rate DBI is enabled when transmitting and
receiving data.
AD_STB0 (2.0),
AD_STBF0 (3.0)
I/O
(s/t/s)
AGP
AD Bus Strobe-0: In AGP 2.0 signaling mode, this signal provides timing for
2x and 4x clocked data on GAD[15:0] and GC/BE[1:0]#. The agent that is
providing data drives this signal.
AD Bus Strobe First-0 in AGP 3.0 signaling mode. In AGP 3.0 signaling
mode this signal strobes the first and all odd numbered data items with a low-
to-high transition. It is used with GAD[15:0] and GC#/BE[1:0]
AD_STB0# (2.0),
AD_STBS0 (3.0)
I/O
(s/t/s)
AGP
AD Bus Strobe-0 Complement: The differential complement to the AD_STB0
signal. In AGP 2.0 signaling mode, this signal is used to provide timing for 4x
clocked data.
AD Bus Strobe Second-0: In AGP 3.0 signaling mode this signal strobes the
second and all even numbered data items with a low-to-high transition.
AD_STB1 (2.0),
AD_STBF1 (3.0)
I/O
(s/t/s)
AGP
AD Bus Strobe-1: In AGP 2.0 signaling mode, this signal provides timing for
2x and 4x clocked data on GAD[31:16] and GC/BE[3:2]#. The agent that is
providing data drives this signal.
AD Bus Strobe First-1: In AGP 3.0 signaling mode this signal strobes the first
and all odd numbered data items with a low-to-high transition. It is used with
GAD[31:16], GC#/BE[3:2], DBI_HI, and DBI_LO.
AD_STB1# (2.0),
AD_STBS1 (3.0)
I/O
(s/t/s)
AGP
AD Bus Strobe-1 Complement: The differential complement to the AD_STB1
signal. In AGP 2.0 signaling mode, it is used to provide timing for 4x clocked
data.
AD Bus Strobe Second-1: In AGP 3.0 signaling mode this signal strobes the
second and all even numbered data items with a low-to-high transition.