Datasheet

Intel Manageability Engine Subsystem PCI (D3:F0,F3)
210 Datasheet
7.2.9 KTMCR—KT Modem Control
B/D/F/Type: 0/3/3/KT MM/IO
Address Offset: 4h
Default Value: 00h
Access: RO, RW
Size: 8 bits
The Modem Control Register controls the interface with the modem. Since the FW
emulates the modem, the Host communicates to the FW via this register. Register has
impact on hardware when the Loopback mode is on.
Note: Reset: Host system Reset or D3->D0 transition.
Bit Access
Default
Value
Description
7:5 RO 000b Reserved
4RW0b
Loop Back Mode (LBM): When set by Host, this bit indicates that the serial
port is in loop Back mode. This means that the data that is transmitted by the
host should be received. Helps in debug of the interface.
3RW0b
Output 2 (OUT2): This bit has no affect on hardware in normal mode. In loop
back mode the value of this bit is written by hardware to Modem Status Register
bit 7.
2RW0b
Output 1 (OUT1): This bit has no affect on hardware in normal mode. In loop
back mode the value of this bit is written by hardware to Modem Status Register
bit 6.
1RW0b
Request to Send Out (RTSO): This bit has no affect on hardware in normal
mode. In loopback mode, the value of this bit is written by hardware to Modem
Status Register bit 4.
0RW0b
Data Terminal Ready Out (DRTO): This bit has no affect on hardware in
normal mode. In loopback mode, the value in this bit is written by hardware to
Modem Status Register Bit 5.