Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-3
INSTRUCTION FORMATS AND ENCODINGS
B.1.4.1 Reg Field (reg) for Non-64-Bit Modes
The reg field in the ModR/M byte specifies a general-purpose register operand. The
group of registers specified is modified by the presence and state of the w bit in an
encoding (refer to Section B.1.4.3). Table B-2 shows the encoding of the reg field
when the w bit is not present in an encoding; Table B-3 shows the encoding of the reg
field when the w bit is present.
Table B-1. Special Fields Within Instruction Encodings
Field Name Description
Number of
Bits
reg General-register specifier (see Table B-4 or B-5) 3
w Specifies if data is byte or full-sized, where full-sized is 16 or 32
bits (see Table B-6)
1
s Specifies sign extension of an immediate field (see Table B-7) 1
sreg2 Segment register specifier for CS, SS, DS, ES (see Table B-8) 2
sreg3 Segment register specifier for CS, SS, DS, ES, FS, GS (see Table B-8) 3
eee Specifies a special-purpose (control or debug) register (see Table
B-9)
3
tttn For conditional instructions, specifies a condition asserted or
negated (see Table B-12)
4
d Specifies direction of data operation (see Table B-11) 1
Table B-2. Encoding of reg Field When w Field is Not Present in Instruction
reg Field
Register Selected during
16-Bit Data Operations
Register Selected during
32-Bit Data Operations
000 AX EAX
001 CX ECX
010 DX EDX
011 BX EBX
100 SP ESP
101 BP EBP
110 SI ESI
111 DI EDI