Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

A-14 Vol. 2B
OPCODE MAP
Table A-3. Two-byte Opcode Map: 88H — FFH (First Byte is 0FH) *
89ABCDEF
8 Jcc
f64
, Jz - Long-displacement jump on condition
S NS P/PE NP/PO L/NGE NL/GE LE/NG NLE/G
9 SETcc, Eb - Byte Set on condition
S NS P/PE NP/PO L/NGE NL/GE LE/NG NLE/G
A PUSH
d64
GS
POP
d64
GS
RSM BTS
Ev, Gv
SHRD
Ev, Gv, Ib
SHRD
Ev, Gv, CL
(Grp 15
1A
)
1C
IMUL
Gv, Ev
B JMPE
(reserved for
emulator on IPF)
Grp 10
1A
Invalid
Opcode
1B
Grp 8
1A
Ev, Ib
BTC
Ev, Gv
BSF
Gv, Ev
BSR
Gv, Ev
MOVSX
Gv, Eb Gv, Ew
C BSWAP
RAX/EAX/
R8/R8D
RCX/ECX/
R9/R9D
RDX/EDX/
R10/R10D
RBX/EBX/
R11/R11D
RSP/ESP/
R12/R12D
RBP/EBP/
R13/R13D
RSI/ESI/
R14/R14D
RDI/EDI/
R15/R15D
D psubusb
Pq, Qq
psubusb (66)
Vdq, Wdq
psubusw
Pq, Qq
psubusw (66)
Vdq, Wdq
pminub
Pq, Qq
pminub (66)
Vdq, Wdq
pand
Pq, Qq
pand (66)
Vdq, Wdq
paddusb
Pq, Qq
paddusb (66)
Vdq, Wdq
paddusw
Pq, Qq
paddusw (66)
Vdq, Wdq
pmaxub
Pq, Qq
pmaxub (66)
Vdq, Wdq
pandn
Pq, Qq
pandn (66)
Vdq, Wdq
E psubsb
Pq, Qq
psubsb (66)
Vdq, Wdq
psubsw
Pq, Qq
psubsw (66)
Vdq, Wdq
pminsw
Pq, Qq
pminsw (66)
Vdq, Wdq
por
Pq, Qq
por (66)
Vdq, Wdq
paddsb
Pq, Qq
paddsb (66)
Vdq, Wdq
paddsw
Pq, Qq
paddsw (66)
Vdq, Wdq
pmaxsw
Pq, Qq
pmaxsw (66)
Vdq, Wdq
pxor
Pq, Qq
pxor (66)
Vdq, Wdq
Fpsubb
Pq, Qq
psubb (66)
Vdq, Wdq
psubw
Pq, Qq
psubw (66)
Vdq, Wdq
psubd
Pq, Qq
psubd (66)
Vdq, Wdq
psubq
Pq, Qq
psubq (66)
Vdq, Wdq
paddb
Pq, Qq
paddb (66)
Vdq, Wdq
paddw
Pq, Qq
paddw (66)
Vdq, Wdq
paddd
Pq, Qq
paddd (66)
Vdq, Wdq
NOTES:
*
All blanks in all opcode maps are reserved and must not be used. Do not depend on the operation of unde-
fined or reserved locations.