Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-315
INSTRUCTION SET REFERENCE, N-Z
SMSW—Store Machine Status Word
Description
Stores the machine status word (bits 0 through 15 of control register CR0) into the
destination operand. The destination operand can be a general-purpose register or a
memory location.
In non-64-bit modes, when the destination operand is a 32-bit register, the low-order
16 bits of register CR0 are copied into the low-order 16 bits of the register and the
high-order 16 bits are undefined. When the destination operand is a memory loca-
tion, the low-order 16 bits of register CR0 are written to memory as a 16-bit quantity,
regardless of the operand size.
In 64-bit mode, the behavior of the SMSW instruction is defined by the following
examples:
• SMSW r16 operand size 16, store CR0[15:0] in r16
• SMSW r32 operand size 32, zero-extend CR0[31:0], and store in r32
• SMSW r64 operand size 64, zero-extend CR0[63:0], and store in r64
• SMSW m16 operand size 16, store CR0[15:0] in m16
• SMSW m16 operand size 32, store CR0[15:0] in m16 (not m32)
• SMSW m16 operands size 64, store CR0[15:0] in m16 (not m64)
SMSW is only useful in operating-system software. However, it is not a privileged
instruction and can be used in application programs. The is provided for compatibility
with the Intel 286 processor. Programs and procedures intended to run on the
Pentium 4, Intel Xeon, P6 family, Pentium, Intel486, and Intel386 processors should
use the MOV (control registers) instruction to load the machine status word.
See “Changes to Instruction Behavior in VMX Non-Root Operation” in Chapter 21 of
the Intel
®
64 and IA-32 Architectures Software Developer’s Manual, Volume 3B, for
more information about the behavior of this instruction in VMX non-root operation.
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
0F 01 /4 SMSW r/m16 Valid Valid Store machine status word to r/m16.
0F 01 /4 SMSW
r32/m16
Valid Valid Store machine status word in low-order
16 bits of r32/m16; high-order 16 bits
of r32 are undefined.
REX.W +
0F 01 /4
SMSW
r64/m16
Valid Valid Store machine status word in low-order
16 bits of r64/m16; high-order 16 bits
of r32 are undefined.