Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-228 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
Opcode** Instruction
64-Bit
Mode
Compat/
Leg
Mode Description
D3 /0 ROL r/m32, CL Valid Valid Rotate 32 bits r/m32 left CL
times.
REX.W + D3 /0 ROL r/m64, CL Valid N.E. Rotate 64 bits r/m64 left CL
times. Uses a 6 bit count.
C1 /0 ib ROL r/m32,
imm8
Valid Valid Rotate 32 bits r/m32 left imm8
times.
C1 /0 ib ROL r/m64,
imm8
Valid N.E. Rotate 64 bits r/m64 left imm8
times. Uses a 6 bit count.
D0 /1 ROR r/m8, 1 Valid Valid Rotate 8 bits r/m8 right once.
REX + D0 /1 ROR r/m8*, 1 Valid N.E. Rotate 8 bits r/m8 right once.
D2 /1 ROR r/m8, CL Valid Valid Rotate 8 bits r/m8 right CL times.
REX + D2 /1 ROR r/m8*, CL Valid N.E. Rotate 8 bits r/m8 right CL times.
C0 /1 ib ROR r/m8,
imm8
Valid Valid Rotate 8 bits r/m16 right imm8
times.
REX + C0 /1 ib ROR r/m8*,
imm8
Valid N.E. Rotate 8 bits r/m16 right imm8
times.
D1 /1 ROR r/m16, 1 Valid Valid Rotate 16 bits r/m16 right once.
D3 /1 ROR r/m16, CL Valid Valid Rotate 16 bits r/m16 right CL
times.
C1 /1 ib ROR r/m16,
imm8
Valid Valid Rotate 16 bits r/m16
right imm8
times.
D1 /1 ROR r/m32, 1 Valid Valid Rotate 32 bits r/m32 right once.
REX.W + D1 /1 ROR r/m64, 1 Valid N.E. Rotate 64 bits r/m64 right once.
Uses a 6 bit count.
D3 /1 ROR r/m32, CL Valid Valid Rotate 32 bits r/m32 right CL
times.
REX.W + D3 /1 ROR r/m64, CL Valid N.E. Rotate 64 bits r/m64 right CL
times. Uses a 6 bit count.
C1 /1 ib ROR r/m32,
imm8
Valid Valid Rotate 32 bits r/m32 right imm8
times.
REX.W + C1 /1
ib
ROR r/m64,
imm8
Valid N.E. Rotate 64 bits r/m64 right imm8
times. Uses a 6 bit count.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix
is used: AH, BH, CH, DH.
** See IA-32 Architecture Compatibility section below.