Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-61
INSTRUCTION SET REFERENCE, N-Z
PCMPEQB/PCMPEQW/PCMPEQD— Compare Packed Data for Equal
Description
Performs a SIMD compare for equality of the packed bytes, words, or doublewords in
the destination operand (first operand) and the source operand (second operand). If
a pair of data elements is equal, the corresponding data element in the destination
operand is set to all 1s; otherwise, it is set to all 0s. The source operand can be an
MMX technology register or a 64-bit memory location, or it can be an XMM register or
a 128-bit memory location. The destination operand can be an MMX technology
register or an XMM register.
The PCMPEQB instruction compares the corresponding bytes in the destination and
source operands; the PCMPEQW instruction compares the corresponding words in
the destination and source operands; and the PCMPEQD instruction compares the
corresponding doublewords in the destination and source operands.
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to
access additional registers (XMM8-XMM15).
Operation
PCMPEQB instruction with 64-bit operands:
IF DEST[7:0]
= SRC[7:0]
THEN DEST[7:0) ← FFH;
ELSE DEST[7:0] ← 0; FI;
(* Continue comparison of 2nd through 7th bytes in DEST and SRC *)
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
0F 74 /r PCMPEQB mm,
mm/m64
Valid Valid Compare packed bytes in
mm/m64 and mm for equality.
66 0F 74 /r PCMPEQB xmm1,
xmm2/m128
Valid Valid Compare packed bytes in
xmm2/m128 and xmm1 for
equality.
0F 75 /r PCMPEQW mm,
mm/m64
Valid Valid Compare packed words in
mm/m64 and mm for equality.
66 0F 75 /r PCMPEQW xmm1,
xmm2/m128
Valid Valid Compare packed words in
xmm2/m128 and xmm1 for
equality.
0F 76 /r PCMPEQD mm,
mm/m64
Valid Valid Compare packed doublewords
in mm/m64 and mm for
equality.
66 0F 76 /r PCMPEQD xmm1,
xmm2/m128
Valid Valid Compare packed doublewords
in xmm2/m128 and xmm1 for
equality.