Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-318 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
SQRTPD—Compute Square Roots of Packed Double-Precision Floating-
Point Values
Description
Performs a SIMD computation of the square roots of the two packed double-precision
floating-point values in the source operand (second operand) stores the packed
double-precision floating-point results in the destination operand. The source
operand can be an XMM register or a 128-bit memory location. The destination
operand is an XMM register. See Figure 11-3 in the Intel
®
64 and IA-32 Architectures
Software Developer’s Manual, Volume 1, for an illustration of a SIMD double-preci-
sion floating-point operation.
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to
access additional registers (XMM8-XMM15).
Operation
DEST[63:0] ← SQRT(SRC[63:0]);
DEST[127:64] ← SQRT(SRC[127:64]);
Intel C/C++ Compiler Intrinsic Equivalent
SQRTPD __m128d _mm_sqrt_pd (m128d a)
SIMD Floating-Point Exceptions
Invalid, Precision, Denormal.
Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS,
ES, FS or GS segments.
If a memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#SS(0) For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
66 0F 51
/r
SQRTPD xmm1,
xmm2/m128
Valid Valid Computes square roots of the
packed double-precision floating-
point values in xmm2/m128 and
stores the results in xmm1.