Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide
Intel
®
Xeon™ Processor and Intel
®
E7500/E7501 Chipset Compatible Platform Design Guide 23
Introduction
NOTES:
1. This data is provided for comparison only; refer to the Intel
®
Xeon™ Processor Datasheet for actual
specifications
The Intel Xeon processor with 512-KB L2 cache and Intel Xeon processor with 533 MHz system
bus include the following advanced microarchitecture features:
• Hyper-Pipelined Technology
• Advanced Dynamic Execution
• Execution Trace Cache
• Streaming SIMD (Single Instruction, Multiple Data) Extensions 2
• Advanced Transfer Cache
• Enhanced Floating Point and Multimedia Engine
The system bus uses a source-synchronous transfer of address and data to improve performance
and enables addressing at 2X the system bus frequency and data transfers at 4X the system bus
frequency of 100 MHz or 133 MHz. This allows the 400 MHz system bus support to transfer data
at 3.2 GB/s for the Intel Xeon processor with 512-KB L2 cache, and the 533 MHz system bus
support to transfer data at 4.27 GB/s for the Intel Xeon processor with 533 MHz system bus.
1.3.2 Intel
®
E7500/E7501 Chipset
The E7500/E7501 chipset consists of three major components: the Intel
®
E7500/E7501 chipset
Memory Controller Hub (referred to throughout this document as the MCH), the Intel
®
82801CA
I/O Controller Hub 3 (hereafter referred to as ICH3-S), and the Intel
®
82870P2
PCI/
PCI-X 64-bit
Hub 2 (abbreviated to P64H2). The chipset components communicate via hub interfaces (HIs). The
MCH provides four hub interface connections: one for the ICH3-S and three for high-speed I/O
using 82870P2 P64H2 components. The hub interfaces are point-to-point and therefore only
support two components (the MCH plus one I/O device). Therefore, the system supports a
maximum of three P64H2 devices.
Table 1-4. Processor Feature Set Overview
Feature
Intel
®
Xeon™ Processor with 512-KB
L2 Cache (INT-mPGA Package)
Intel
®
Xeon™ Processor with
533 MHz System Bus
(FC-mPGAs Package)
Processor System Bus (PSB) 400 MHz 533 MHz
Data Bus Transfer Rate 3.2 GB/s 4.27 GB/s
Manageability Features
PIROM, Scratch EEPROMs and
Thermal Sensor on Package
Direct Thermal Diode Access
Operating Voltage 1.500 V
Socket 603-Pin Socket and mPGA604 Socket mPGA604 Socket Only
Package Dimensions
1
X-Y: 53.5 mm
Z: 5.0 mm
X-Y: 42.5 mm
Z: 3.6 mm