64-bit Intel Xeon Processor with 2MB L2 Cache Thermal/Mechanical Design Guidelines

64-bit Intel® Xeon™ Processor with 2MB L2 Cache Thermal/Mechanical Design Guidelines 75
Processor Thermal Management Logic and Thermal Monitor Features
E.1.8.1 THERMTRIP# Signal Pin
In the event of a catastrophic cooling failure, the processor will automatically shut down when the
silicon temperature has reached its operating limit. At this point the system bus signal
THERMTRIP# signal goes active and power must be removed from the processor. THERMTRIP#
stays active until RESET# has been initiated. THERMTRIP# activation is independent of
processor activity and does not generate any bus cycles.
E.1.8.2 FORCEPR# Signal Pin
The 64-bit Intel Xeon Processor with 2MB L2 Cache provides a means for system hardware to
force activation of the TCC. One possible usage model would be to use this capability to protect the
voltage regulator from overheating in order to avoid a catastrophic shutdown. Refer to the
appropriate platform design guidelines and voltage regulator design guidelines for implementation
details. The use of the FORCEPR# signal pin requires that BIOS code enable the signal’s
recognition via an MSR. Refer to
IA-32 Intel
®
Architecture Software Developer's Manual
Volume 3: System Programming Guide
for details on enabling this feature.
Figure E-4. On-Die Thermal Diode Sensor Time Delay