64-bit Intel Xeon Processor with 800 MHz System Bus (1MB and 2MB L2 Cache Versions) Specification Update

Intel
®
Xeon™ Processor with 800 MHz System Bus—
64-bit Intel
®
Xeon
®
Processor with 800 MHz System Bus (1 MB and 2 MB L2 Cache Versions)
Specification Update August 2009
4 Order Number: 302402-024
Revision History
Version Description Date
-001 Initial release of the document. July 2004
-002 Removed erratum P18 and renumbered existing errata. July 2004
-003 Added errata S32-S35. Renamed errata numbering from P to S. August 2004
-004
Removed erratum S29 and renumbered existing errata.
Added errata S35-S65.
Added E0 step processor information to Table 2-1, “Identification
Information”.
Added new notes to Table 2-2, “64-bit Inte Xeon® Processor with
800 MHz System Bus (1 MB and 2 MB L2 Cache Versions)
Identification Information and deleted unnecessary notes.
Added Table 2-3, “DP Platform Population Matrix for the 64-bit Inte
Xeon® Processor with 800 MHz System Bus (1 MB and 2 MB L2
Cache Versions) FC-PGA4 Package”.
September
2004
-005 Added errata S66-S73. October 2004
-006
Updated S-Spec table, code key, and mixed steppings statement to
include Low Voltage Intel® Xeon® processor
Added errata S74-S75.
November
2004
-007 Updated erratum S26. Added errata S76and S77. December 2004
-008
Added errata S78-S79; added additional text to “Mixed Steppings In
DP Systems” chapter.
January 2005
-009
Added 2 MB L2 cache version of the 64-bit Intel® Xeo processor
with 800 MHz system bus; added errata S80-S81; added S-spec
numbers SL7ZC, SL7ZD, SL7ZE, and SL7ZF to Table 2-2.
February 2005
-010
Updated errata S28 and S53; updated summary table entries for S19
and S43.
March 2005
-011
Updated Table 2-2; added erratum S82; updated plans column for
erratum S27; added Specification Clarification 1.
April 2005
-012 Updated steppings affected for erratum S27. May 2005
-013 Updated Table 2-2. June 2005
-014 Added erratum S83. Updated relevant document lists. July 2005
-015 Updated summary table entry for S19. Added erratum S84. August 2005
-016
Added errata S85 and S86. Added S-spec numbers to Ta bl e 2 -2 .
Added R-0 stepping to summary table of changes. Updated summary
table entries. Removed duplicate erratum S33.
September
2005
-017
Added erratum S87. Updated letters in Codes used in Summary
Table. Corrected S-spec notes for 3.40 GHz entries.
October 2005
-018
Added errata S88 and S89. Updated steppings affected for S22.
Updated Mixed Steppings in DP Systems section.
November
2005
-019 Added erratum S90. December 2005
-020 Added erratum S91. Updated erratum S17. January 2006
-021 Added erratum S1S and S92. May 2006