64-bit Intel Xeon Processor with 800 MHz System Bus (1MB and 2MB L2 Cache Versions) Specification Update
Intel
®
Xeon™ Processor with 800 MHz System Bus—
64-bit Intel
®
Xeon
®
Processor with 800 MHz System Bus (1 MB and 2 MB L2 Cache Versions)
Specification Update August 2009
8 Order Number: 302402-024
The 64-bit Intel
®
Xeon
®
Processor with 800 MHz System Bus (1 MB and 2 MB L2 cache
versions) can be identified by the following values:
Cache and TLB descriptor parameters are provided in the EAX, EBX, ECX and EDX registers
after the CPUID instruction is executed with a 2 in the EAX register. Please refer to the Intel
Processor Identification and the CPUID Instruction Application Note (AP-485) for further
information on the CPUID instruction.
Table 2-1. Identification Information
Family
1
1. The Family corresponds to bits [11:8] of the EDX register after RESET, bits
[11:8] of the EAX register after the CPUID instruction is executed with a 1
in the EAX register, and the generation field of the Device ID registers ac-
cessible through Boundary Scan
Model
2
2. The Model corresponds to bits [7:4] of the EDX register after RESET, bits
[7:4] of the EAX register after the CPUID instruction is executed with a 1
in the EAX register, and the model field of the Device ID registers acces-
sible through Boundary Scan.
Brand ID
3
3. Brand ID returns 0000b, which means that Brand ID is unsupported in this
processor.
1111b 0011b 0000b
1111b 0100b 0000b
Table 2-2. 64-bit Intel
®
Xeon
®
Processor with 800 MHz System Bus (1 MB and 2 MB L2 Cache
Versions) Identification Information (Sheet 1 of 3)
S-Spec
Core
Stepping
CPUI
D
Core
Freq
(GHz)
Data
Bus
Freq
(MHz)
L2
Cache
Size
Processor
Package
Revision
Package and Revision Notes
SL7DV
D-0 0F34h 2.80 800 1 MB 01
604-pin micro-PGA with
42.5 x 42.5 mm FC-PGA4
package
SL7HF 1
SL7DW
D-0 0F34h 3 800 1 MB 01
604-pin micro-PGA with
42.5 x 42.5 mm FC-PGA4
package
SL7HG 1
SL7DX
D-0 0F34h 3.20 800 1 MB 01
604-pin micro-PGA with
42.5 x 42.5 mm FC-PGA4
package
SL7HH 1
SL7DY
D-0 0F34h 3.40 800 1 MB 01
604-pin micro-PGA with
42.5 x 42.5 mm FC-PGA4
package
2, 3
SL7HJ 1, 2, 3
SL7DZ
D-0 0F34h 3.60 800 1 MB 01
604-pin micro-PGA with
42.5 x 42.5 mm FC-PGA4
package
2, 3
SL7HK 1, 2, 3
NOTES:
1. These are Intel boxed processors.
2. These parts have Thermal Monitor 2 (TM2) feature enabled. For D-0 stepping, TM2 is enabled on 3.40 GHz
and above, but it is NOT supported.
3. These parts are enabled for Enhanced Intel SpeedStep
®
Technology (EIST).
4. These parts are enabled for Enhanced Halt State (C1E).
5. These parts are LV (low-power) processors.
6. These parts have Execute Disable bit functionality.
7. These parts are MV (mid-power) processors.