Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

System Bus Routing Guidelines
70 Intel
®
Xeon™ Processor and Intel
®
E7500/E7501 Chipset Compatible Platform Design Guide
5.3.2.1 Proper THERMTRIP# Usage
To protect the processors from damage in over-temperature situations, power to the processor core
must be removed within 0.5 seconds of the assertion of THERMTRIP#. If power is applied to a
processor when no thermal solution is attached, normal leakage currents causes the die temperature
to rapidly rise to levels at which permanent silicon damage is possible. This high temperature
causes THERMTRIP# to go active. Use dual termination on the THERMTRIP# signal. Each
processor’s THERMTRIP# can be routed to its own receiver, or they can be wire-OR’d together. If
routed separately, each signal must be terminated at the receiver end only. All power supply
sources to all processors must be disabled when any installed processor signals THERMTRIP#. In
the reference schematic, the 74AHC74 flip-flop latches the THERMTRIP# signal HIGH after a
PWRGOOD assertion, and LOW after a THERMTRIP# assertion.
5.3.3 System Bus COMP Routing Guidelines
Terminate the processor COMP[1:0] pins to ground through 49.9 Ω ± 1% resistors. Do not wire the
COMP pins together—connect each pin to its own termination resistor.
Terminate the MCH HXRCOMP and HYRCOMP with a 25 Ω ± 1% resistor pull-down to ground.
Terminate the MCH HXSWING and HYSWING using a 150 Ω ± 1% resistor pull-down to ground,
and a 301 Ω ± 1% pull-up to VCC_CPU, respectively. Use two 0.01 µF decoupling capacitors.
5.3.4 ODTEN Signal Routing Guidelines
Processor 0, the end processor in a dual-processor system, must have its on-die termination
enabled. To enable the on-die termination, pull the ODTEN pin to a high state by pulling it up to
VCC_CPU through a 50 Ω ± 20% resistor. The resistor value must be within 20% of the trace
impedance (50 Ω ± 20%). Processor 1, the middle agent, must have its on-die termination disabled.
To disable on-die termination, pull the ODTEN pin to a low state by terminating it to ground
through a 50 Ω ± 20% resistor.
Figure 5-6. Recommended THERMTRIP# Circuit
D
Q
Q
SET
CLR
3904
3904
10 kΩ1 kΩ
62 Ω
12 V
74AHC74
VCC=3VSBY
3VSBY
VCC_CPU
THERMTRIP#
THERM_EN to VR
100 Ω
1 kΩ
1 kΩ
3.3 kΩ