64-bit Intel Xeon Processorwith 1MB L2 Cache Thermal/Mechanical Design Guidelines

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Processor Thermal Management Logic and Thermal Monitor Features
64-bit Intel
®
Xeon™ Processor MP with 1 MB L2 Cache 59
Thermal/Mechanical Design Guidelines
systems that utilize execution based timing routines. The BIOS must disable the TCC prior to boot
and then the operating system or BIOS must enable the TCC after the operating system boot process
completes.
Intel has worked with the major operating system vendors to ensure support for non-execution based
operating system calibration loops and ACPI support for the Thermal Monitor feature.
F.1.7 Legacy Thermal Management Capabilities
In addition to Thermal Monitor, the 64-bit Intel Xeon processor MP with 1 MB L2 cache supports
the same thermal management features originally introduced with the Intel
®
Pentium
®
III Xeon™
processor. These features include the on-die thermal diode and THERMTRIP# signal for indicating
catastrophic thermal failure.
F.1.7.1 On-Die Thermal Diode
There are two independent thermal diodes in the 64-bit Intel Xeon processor MP with 1 MB L2
cache. One is the on-die thermal diode and the other is in the temperature sensor used for the
Thermal Monitor and for THERMTRIP#. The Thermal Monitor’s temperature sensor and the on-die
thermal diode are independent and isolated devices with no direct correlation to one another. Circuit
constraints and performance requirements prevent the Thermal Monitor’s temperature sensor and
the on-die thermal diode from being located at the same place on the silicon. The temperature
distribution across the die may result in significant temperature differences between the on-die
thermal diode and the Thermal Monitor’s temperature sensor. This temperature variability across the
die is highly dependent on the application being run. As a result, it is not possible to predict the
activation of the TCC by monitoring the on-die thermal diode.
System integrators that plan on using the thermal diode for system or component level fan control
need to be aware of the potential for rapid changes in processor power consumption as the executing
workload changes. Variable performance thermal solutions that fail to react quickly to changing
workloads may experience TCC activation or worst yet, result in automatic shutdown via
THERMTRIP# (refer to Appendix F.1.7.2 for more information on THERMTRIP). One example of
this situation is as follows: A fan control scheme slows the fans such that the processor is operating
very near the thermal trip point while executing a relatively low power workload. The start of a
higher power application creates a sudden increase in power consumption and elevates the
temperature of the processor above the trip point, causing the TCC to activate. The power reduction
resulting from TCC activation slows the rate of temperature increase, but is not sufficient to clamp
the temperature, due to inadequate thermal solution performance at reduced fan speed. As a result,
the temperature continues to slowly increase. The fan is then sped up to compensate for the change
in processor workload but reacts too slowly to prevent the processor from shutting down due to
THERMTRIP# activation.
High temperature change rates on-die can also limit the ability to accurately measure the on-die
thermal diode temperature. As a result, the on-die thermal diode should not be relied upon to warn
of processor cooling system failure or predict the onset of the TCC. An illustration of this is as
follows. Many thermal diode sensors report temperatures a maximum of 8 times per second. Within
the 1/8
th
(0.125 sec.) second time period, the temperature is averaged over 1/16
th
of a second. In a
scenario where the silicon temperature ramps at 50°C/sec, or approximately 6°C/0.125 sec, the
processor will be ~4.5°C above the temperature reported by the thermal sensor. Change in diode
temperature averaged over 1/16
th
seconds = ~1.5°C; temperature reported 1/16
th
second later at 1/8
th
second when the actual processor temperature would be 6°C higher (see Figure F-4).